/dports/emulators/yuzu/yuzu-0b47f7a46/externals/dynarmic/src/frontend/ir/ |
H A D | opcodes.inc | 198 OPCODE(VectorSignedSaturatedAdd8, U128, U128, U128 … 199 OPCODE(VectorSignedSaturatedAdd16, U128, U128, U128 … 200 OPCODE(VectorSignedSaturatedAdd32, U128, U128, U128 … 201 OPCODE(VectorSignedSaturatedAdd64, U128, U128, U128 … 202 OPCODE(VectorSignedSaturatedSub8, U128, U128, U128 … 203 OPCODE(VectorSignedSaturatedSub16, U128, U128, U128 … 204 OPCODE(VectorSignedSaturatedSub32, U128, U128, U128 … 205 OPCODE(VectorSignedSaturatedSub64, U128, U128, U128 … 627 …ectorMulAdd16, U128, U128, U128, … 628 …ectorMulAdd32, U128, U128, U128, … [all …]
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H A D | ir_emitter.h | 228 U128 VectorAdd(size_t esize, const U128& a, const U128& b); 229 U128 VectorAnd(const U128& a, const U128& b); 235 U128 VectorEor(const U128& a, const U128& b); 240 U128 VectorEqual(size_t esize, const U128& a, const U128& b); 260 U128 VectorMaxSigned(size_t esize, const U128& a, const U128& b); 262 U128 VectorMinSigned(size_t esize, const U128& a, const U128& b); 264 U128 VectorMultiply(size_t esize, const U128& a, const U128& b); 266 U128 VectorNot(const U128& a); 267 U128 VectorOr(const U128& a, const U128& b); 276 U128 VectorPolynomialMultiply(const U128& a, const U128& b); [all …]
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H A D | ir_emitter.cpp | 956 U128 IREmitter::VectorAdd(size_t esize, const U128& a, const U128& b) { in VectorAdd() 970 U128 IREmitter::VectorAnd(const U128& a, const U128& b) { in VectorAnd() 1096 U128 IREmitter::VectorEor(const U128& a, const U128& b) { in VectorEor() 1100 U128 IREmitter::VectorEqual(size_t esize, const U128& a, const U128& b) { in VectorEqual() 1286 U128 IREmitter::VectorMaxSigned(size_t esize, const U128& a, const U128& b) { in VectorMaxSigned() 1314 U128 IREmitter::VectorMinSigned(size_t esize, const U128& a, const U128& b) { in VectorMinSigned() 1342 U128 IREmitter::VectorMultiply(size_t esize, const U128& a, const U128& b) { in VectorMultiply() 1372 U128 IREmitter::VectorOr(const U128& a, const U128& b) { in VectorOr() 1376 U128 IREmitter::VectorPairedAdd(size_t esize, const U128& a, const U128& b) { in VectorPairedAdd() 1478 U128 IREmitter::VectorPolynomialMultiply(const U128& a, const U128& b) { in VectorPolynomialMultiply() [all …]
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/dports/emulators/citra-qt5/citra-ac98458e0/externals/dynarmic/src/backend/A64/ |
H A D | opcodes.inc | 251 //OPCODE(VectorAdd8, U128, U128, U128 … 252 //OPCODE(VectorAdd16, U128, U128, U128 … 253 //OPCODE(VectorAdd32, U128, U128, U128 … 254 //OPCODE(VectorAdd64, U128, U128, U128 … 255 //OPCODE(VectorAnd, U128, U128, U128 … 260 //OPCODE(VectorArithmeticVShift8, U128, U128, U128 … 261 //OPCODE(VectorArithmeticVShift16, U128, U128, U128 … 262 //OPCODE(VectorArithmeticVShift32, U128, U128, U128 … 571 …ectorMulAdd16, U128, U128, U128, … 572 …ectorMulAdd32, U128, U128, U128, … [all …]
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/dports/emulators/citra/citra-ac98458e0/externals/dynarmic/src/backend/A64/ |
H A D | opcodes.inc | 251 //OPCODE(VectorAdd8, U128, U128, U128 … 252 //OPCODE(VectorAdd16, U128, U128, U128 … 253 //OPCODE(VectorAdd32, U128, U128, U128 … 254 //OPCODE(VectorAdd64, U128, U128, U128 … 255 //OPCODE(VectorAnd, U128, U128, U128 … 260 //OPCODE(VectorArithmeticVShift8, U128, U128, U128 … 261 //OPCODE(VectorArithmeticVShift16, U128, U128, U128 … 262 //OPCODE(VectorArithmeticVShift32, U128, U128, U128 … 571 …ectorMulAdd16, U128, U128, U128, … 572 …ectorMulAdd32, U128, U128, U128, … [all …]
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/dports/emulators/citra/citra-ac98458e0/externals/dynarmic/src/frontend/ir/ |
H A D | opcodes.inc | 199 OPCODE(VectorSignedSaturatedAdd8, U128, U128, U128 … 200 OPCODE(VectorSignedSaturatedAdd16, U128, U128, U128 … 201 OPCODE(VectorSignedSaturatedAdd32, U128, U128, U128 … 202 OPCODE(VectorSignedSaturatedAdd64, U128, U128, U128 … 203 OPCODE(VectorSignedSaturatedSub8, U128, U128, U128 … 204 OPCODE(VectorSignedSaturatedSub16, U128, U128, U128 … 205 OPCODE(VectorSignedSaturatedSub32, U128, U128, U128 … 206 OPCODE(VectorSignedSaturatedSub64, U128, U128, U128 … 605 …ectorMulAdd16, U128, U128, U128, … 606 …ectorMulAdd32, U128, U128, U128, … [all …]
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H A D | ir_emitter.h | 228 U128 VectorAdd(size_t esize, const U128& a, const U128& b); 229 U128 VectorAnd(const U128& a, const U128& b); 235 U128 VectorEor(const U128& a, const U128& b); 238 U128 VectorEqual(size_t esize, const U128& a, const U128& b); 264 U128 VectorNot(const U128& a); 265 U128 VectorOr(const U128& a, const U128& b); 274 U128 VectorPolynomialMultiply(const U128& a, const U128& b); 299 U128 VectorSub(size_t esize, const U128& a, const U128& b); 348 U128 FPVectorAdd(size_t esize, const U128& a, const U128& b); 349 U128 FPVectorDiv(size_t esize, const U128& a, const U128& b); [all …]
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H A D | ir_emitter.cpp | 956 U128 IREmitter::VectorAdd(size_t esize, const U128& a, const U128& b) { in VectorAdd() 970 U128 IREmitter::VectorAnd(const U128& a, const U128& b) { in VectorAnd() 1068 U128 IREmitter::VectorEor(const U128& a, const U128& b) { in VectorEor() 1072 U128 IREmitter::VectorEqual(size_t esize, const U128& a, const U128& b) { in VectorEqual() 1344 U128 IREmitter::VectorOr(const U128& a, const U128& b) { in VectorOr() 1450 U128 IREmitter::VectorPolynomialMultiply(const U128& a, const U128& b) { in VectorPolynomialMultiply() 1728 U128 IREmitter::VectorSub(size_t esize, const U128& a, const U128& b) { in VectorSub() 2285 U128 IREmitter::FPVectorAdd(size_t esize, const U128& a, const U128& b) { in FPVectorAdd() 2295 U128 IREmitter::FPVectorDiv(size_t esize, const U128& a, const U128& b) { in FPVectorDiv() 2359 U128 IREmitter::FPVectorMax(size_t esize, const U128& a, const U128& b) { in FPVectorMax() [all …]
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/dports/emulators/citra-qt5/citra-ac98458e0/externals/dynarmic/src/frontend/ir/ |
H A D | opcodes.inc | 199 OPCODE(VectorSignedSaturatedAdd8, U128, U128, U128 … 200 OPCODE(VectorSignedSaturatedAdd16, U128, U128, U128 … 201 OPCODE(VectorSignedSaturatedAdd32, U128, U128, U128 … 202 OPCODE(VectorSignedSaturatedAdd64, U128, U128, U128 … 203 OPCODE(VectorSignedSaturatedSub8, U128, U128, U128 … 204 OPCODE(VectorSignedSaturatedSub16, U128, U128, U128 … 205 OPCODE(VectorSignedSaturatedSub32, U128, U128, U128 … 206 OPCODE(VectorSignedSaturatedSub64, U128, U128, U128 … 605 …ectorMulAdd16, U128, U128, U128, … 606 …ectorMulAdd32, U128, U128, U128, … [all …]
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H A D | ir_emitter.h | 228 U128 VectorAdd(size_t esize, const U128& a, const U128& b); 229 U128 VectorAnd(const U128& a, const U128& b); 235 U128 VectorEor(const U128& a, const U128& b); 238 U128 VectorEqual(size_t esize, const U128& a, const U128& b); 264 U128 VectorNot(const U128& a); 265 U128 VectorOr(const U128& a, const U128& b); 274 U128 VectorPolynomialMultiply(const U128& a, const U128& b); 299 U128 VectorSub(size_t esize, const U128& a, const U128& b); 348 U128 FPVectorAdd(size_t esize, const U128& a, const U128& b); 349 U128 FPVectorDiv(size_t esize, const U128& a, const U128& b); [all …]
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H A D | ir_emitter.cpp | 956 U128 IREmitter::VectorAdd(size_t esize, const U128& a, const U128& b) { in VectorAdd() 970 U128 IREmitter::VectorAnd(const U128& a, const U128& b) { in VectorAnd() 1068 U128 IREmitter::VectorEor(const U128& a, const U128& b) { in VectorEor() 1072 U128 IREmitter::VectorEqual(size_t esize, const U128& a, const U128& b) { in VectorEqual() 1344 U128 IREmitter::VectorOr(const U128& a, const U128& b) { in VectorOr() 1450 U128 IREmitter::VectorPolynomialMultiply(const U128& a, const U128& b) { in VectorPolynomialMultiply() 1728 U128 IREmitter::VectorSub(size_t esize, const U128& a, const U128& b) { in VectorSub() 2285 U128 IREmitter::FPVectorAdd(size_t esize, const U128& a, const U128& b) { in FPVectorAdd() 2295 U128 IREmitter::FPVectorDiv(size_t esize, const U128& a, const U128& b) { in FPVectorDiv() 2359 U128 IREmitter::FPVectorMax(size_t esize, const U128& a, const U128& b) { in FPVectorMax() [all …]
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/dports/net/ipinfo-cli/cli-ipinfo-2.7.0/lib/ |
H A D | u128.go | 188 func (v1 U128) Cmp(v2 U128) int { argument 199 func (v1 U128) Eq(v2 U128) bool { argument 224 func (v1 U128) And(v2 U128) U128 { argument 234 func (v1 U128) Or(v2 U128) U128 { argument 244 func (v1 U128) Xor(v2 U128) U128 { argument 254 func (v U128) Not() U128 { argument 260 func (v1 U128) Add(v2 U128) (U128, uint64) { argument 276 func (v U128) AddOne() U128 { argument 283 func (v1 U128) Sub(v2 U128) (U128, uint64) { argument 299 func (v U128) SubOne() U128 { argument [all …]
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/dports/security/py-pyvex/pyvex-9.0.5405/vex/pub/ |
H A D | libvex_guest_ppc32.h | 104 /* 128 */ U128 guest_VSR0; 105 /* 144 */ U128 guest_VSR1; 106 /* 160 */ U128 guest_VSR2; 107 /* 176 */ U128 guest_VSR3; 108 /* 192 */ U128 guest_VSR4; 109 /* 208 */ U128 guest_VSR5; 110 /* 224 */ U128 guest_VSR6; 111 /* 240 */ U128 guest_VSR7; 112 /* 256 */ U128 guest_VSR8; 113 /* 272 */ U128 guest_VSR9; [all …]
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H A D | libvex_guest_ppc64.h | 142 /* 256 */ U128 guest_VSR0; 143 /* 272 */ U128 guest_VSR1; 144 /* 288 */ U128 guest_VSR2; 145 /* 304 */ U128 guest_VSR3; 146 /* 320 */ U128 guest_VSR4; 147 /* 336 */ U128 guest_VSR5; 148 /* 352 */ U128 guest_VSR6; 149 /* 368 */ U128 guest_VSR7; 150 /* 384 */ U128 guest_VSR8; 151 /* 400 */ U128 guest_VSR9; [all …]
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H A D | libvex_guest_arm64.h | 93 U128 guest_Q0; 94 U128 guest_Q1; 95 U128 guest_Q2; 96 U128 guest_Q3; 97 U128 guest_Q4; 98 U128 guest_Q5; 99 U128 guest_Q6; 100 U128 guest_Q7; 101 U128 guest_Q8; 102 U128 guest_Q9; [all …]
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/dports/devel/valgrind-lts/valgrind-dragonfly-dragonfly/VEX/pub/ |
H A D | libvex_guest_ppc32.h | 104 /* 128 */ U128 guest_VSR0; 105 /* 144 */ U128 guest_VSR1; 106 /* 160 */ U128 guest_VSR2; 107 /* 176 */ U128 guest_VSR3; 108 /* 192 */ U128 guest_VSR4; 109 /* 208 */ U128 guest_VSR5; 110 /* 224 */ U128 guest_VSR6; 111 /* 240 */ U128 guest_VSR7; 112 /* 256 */ U128 guest_VSR8; 113 /* 272 */ U128 guest_VSR9; [all …]
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H A D | libvex_guest_ppc64.h | 142 /* 256 */ U128 guest_VSR0; 143 /* 272 */ U128 guest_VSR1; 144 /* 288 */ U128 guest_VSR2; 145 /* 304 */ U128 guest_VSR3; 146 /* 320 */ U128 guest_VSR4; 147 /* 336 */ U128 guest_VSR5; 148 /* 352 */ U128 guest_VSR6; 149 /* 368 */ U128 guest_VSR7; 150 /* 384 */ U128 guest_VSR8; 151 /* 400 */ U128 guest_VSR9; [all …]
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H A D | libvex_guest_arm64.h | 93 U128 guest_Q0; 94 U128 guest_Q1; 95 U128 guest_Q2; 96 U128 guest_Q3; 97 U128 guest_Q4; 98 U128 guest_Q5; 99 U128 guest_Q6; 100 U128 guest_Q7; 101 U128 guest_Q8; 102 U128 guest_Q9; [all …]
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/dports/devel/valgrind/valgrind-dragonfly-dragonfly/VEX/pub/ |
H A D | libvex_guest_ppc32.h | 104 /* 128 */ U128 guest_VSR0; 105 /* 144 */ U128 guest_VSR1; 106 /* 160 */ U128 guest_VSR2; 107 /* 176 */ U128 guest_VSR3; 108 /* 192 */ U128 guest_VSR4; 109 /* 208 */ U128 guest_VSR5; 110 /* 224 */ U128 guest_VSR6; 111 /* 240 */ U128 guest_VSR7; 112 /* 256 */ U128 guest_VSR8; 113 /* 272 */ U128 guest_VSR9; [all …]
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H A D | libvex_guest_ppc64.h | 142 /* 256 */ U128 guest_VSR0; 143 /* 272 */ U128 guest_VSR1; 144 /* 288 */ U128 guest_VSR2; 145 /* 304 */ U128 guest_VSR3; 146 /* 320 */ U128 guest_VSR4; 147 /* 336 */ U128 guest_VSR5; 148 /* 352 */ U128 guest_VSR6; 149 /* 368 */ U128 guest_VSR7; 150 /* 384 */ U128 guest_VSR8; 151 /* 400 */ U128 guest_VSR9; [all …]
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H A D | libvex_guest_arm64.h | 93 U128 guest_Q0; 94 U128 guest_Q1; 95 U128 guest_Q2; 96 U128 guest_Q3; 97 U128 guest_Q4; 98 U128 guest_Q5; 99 U128 guest_Q6; 100 U128 guest_Q7; 101 U128 guest_Q8; 102 U128 guest_Q9; [all …]
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/dports/emulators/yuzu/yuzu-0b47f7a46/externals/dynarmic/src/frontend/A64/translate/impl/ |
H A D | simd_sha.cpp | 25 IR::U128 x = ir.GetQ(Vd); in SHA1HashUpdate() 27 const IR::U128 w = ir.GetQ(Vm); in SHA1HashUpdate() 71 IR::U128 SHA256hash(IREmitter& ir, IR::U128 x, IR::U128 y, IR::U128 w, SHA256HashPart part) { in SHA256hash() 131 const IR::U128 d = ir.GetQ(Vd); in SHA1SU0() 132 const IR::U128 m = ir.GetQ(Vm); in SHA1SU0() 133 const IR::U128 n = ir.GetQ(Vn); in SHA1SU0() 135 IR::U128 result = [&] { in SHA1SU0() 151 const IR::U128 d = ir.GetQ(Vd); in SHA1SU1() 152 const IR::U128 n = ir.GetQ(Vn); in SHA1SU1() 181 const IR::U128 t = [&] { in SHA256SU0() [all …]
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H A D | simd_three_same.cpp | 30 const IR::U128 operand1 = v.ir.GetQ(Vn); in HighNarrowingOperation() 31 const IR::U128 operand2 = v.ir.GetQ(Vm); in HighNarrowingOperation() 32 IR::U128 wide = [&] { in HighNarrowingOperation() 67 const IR::U128 result = [&] { in SignedAbsoluteDifference() 114 const IR::U128 result = [&] { in RoundingShiftLeft() 144 const IR::U128 result = [&] { in FPCompareRegister() 185 const IR::U128 result = [&] { in VectorMinMaxOperation() 218 const IR::U128 result = [&] { in FPMinMaxOperation() 267 IR::U128 result = [&] { in PairedMinMaxOperation() 338 const IR::U128 result = [&] { in SaturatingArithmeticOperation() [all …]
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/dports/emulators/citra-qt5/citra-ac98458e0/externals/dynarmic/src/frontend/A64/translate/impl/ |
H A D | simd_sha.cpp | 25 IR::U128 x = ir.GetQ(Vd); in SHA1HashUpdate() 27 const IR::U128 w = ir.GetQ(Vm); in SHA1HashUpdate() 71 IR::U128 SHA256hash(IREmitter& ir, IR::U128 x, IR::U128 y, IR::U128 w, SHA256HashPart part) { in SHA256hash() 131 const IR::U128 d = ir.GetQ(Vd); in SHA1SU0() 132 const IR::U128 m = ir.GetQ(Vm); in SHA1SU0() 133 const IR::U128 n = ir.GetQ(Vn); in SHA1SU0() 135 IR::U128 result = [&] { in SHA1SU0() 151 const IR::U128 d = ir.GetQ(Vd); in SHA1SU1() 152 const IR::U128 n = ir.GetQ(Vn); in SHA1SU1() 181 const IR::U128 t = [&] { in SHA256SU0() [all …]
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/dports/emulators/citra/citra-ac98458e0/externals/dynarmic/src/frontend/A64/translate/impl/ |
H A D | simd_sha.cpp | 25 IR::U128 x = ir.GetQ(Vd); in SHA1HashUpdate() 27 const IR::U128 w = ir.GetQ(Vm); in SHA1HashUpdate() 71 IR::U128 SHA256hash(IREmitter& ir, IR::U128 x, IR::U128 y, IR::U128 w, SHA256HashPart part) { in SHA256hash() 131 const IR::U128 d = ir.GetQ(Vd); in SHA1SU0() 132 const IR::U128 m = ir.GetQ(Vm); in SHA1SU0() 133 const IR::U128 n = ir.GetQ(Vn); in SHA1SU0() 135 IR::U128 result = [&] { in SHA1SU0() 151 const IR::U128 d = ir.GetQ(Vd); in SHA1SU1() 152 const IR::U128 n = ir.GetQ(Vn); in SHA1SU1() 181 const IR::U128 t = [&] { in SHA256SU0() [all …]
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