Home
last modified time | relevance | path

Searched refs:UNW_REG_B1 (Results 1 – 25 of 30) sorted by relevance

12

/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/ia64/kernel/
H A Dunwind_i.h34 UNW_REG_B1, UNW_REG_B2, UNW_REG_B3, UNW_REG_B4, UNW_REG_B5, enumerator
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/ia64/kernel/
H A Dunwind_i.h34 UNW_REG_B1, UNW_REG_B2, UNW_REG_B3, UNW_REG_B4, UNW_REG_B5, enumerator
/dports/multimedia/libv4l/linux-5.13-rc2/arch/ia64/kernel/
H A Dunwind_i.h34 UNW_REG_B1, UNW_REG_B2, UNW_REG_B3, UNW_REG_B4, UNW_REG_B5, enumerator
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gcc/gcc/config/ia64/
H A Dunwind-ia64.c100 UNW_REG_B0, UNW_REG_B1, enumerator
101 UNW_REG_B5 = UNW_REG_B1 + 4,
447 case 0x41 ... 0x45: return UNW_REG_B1 + (abreg - 0x41); in decode_abreg()
545 regs[2] = sr->curr.reg + UNW_REG_B1; in finish_prologue()
564 alloc_spill_area (&off, 8, sr->curr.reg + UNW_REG_B1, in finish_prologue()
642 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR, in desc_br_gr()
657 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME, in desc_br_mem()
1971 case UNW_REG_B1 ... UNW_REG_B5: in uw_update_reg_address()
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gcc/gcc/config/ia64/
H A Dunwind-ia64.c100 UNW_REG_B0, UNW_REG_B1, enumerator
101 UNW_REG_B5 = UNW_REG_B1 + 4,
447 case 0x41 ... 0x45: return UNW_REG_B1 + (abreg - 0x41); in decode_abreg()
545 regs[2] = sr->curr.reg + UNW_REG_B1; in finish_prologue()
564 alloc_spill_area (&off, 8, sr->curr.reg + UNW_REG_B1, in finish_prologue()
642 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR, in desc_br_gr()
657 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME, in desc_br_mem()
1971 case UNW_REG_B1 ... UNW_REG_B5: in uw_update_reg_address()
/dports/lang/gcc6-aux/gcc-6-20180516/libgcc/config/ia64/
H A Dunwind-ia64.c91 UNW_REG_B0, UNW_REG_B1, enumerator
92 UNW_REG_B5 = UNW_REG_B1 + 4,
445 case 0x41 ... 0x45: return UNW_REG_B1 + (abreg - 0x41); in decode_abreg()
543 regs[2] = sr->curr.reg + UNW_REG_B1; in finish_prologue()
562 alloc_spill_area (&off, 8, sr->curr.reg + UNW_REG_B1, in finish_prologue()
640 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR, in desc_br_gr()
655 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME, in desc_br_mem()
2016 case UNW_REG_B1 ... UNW_REG_B5: in uw_update_reg_address()
/dports/lang/gcc8/gcc-8.5.0/libgcc/config/ia64/
H A Dunwind-ia64.c91 UNW_REG_B0, UNW_REG_B1, enumerator
92 UNW_REG_B5 = UNW_REG_B1 + 4,
445 case 0x41 ... 0x45: return UNW_REG_B1 + (abreg - 0x41); in decode_abreg()
543 regs[2] = sr->curr.reg + UNW_REG_B1; in finish_prologue()
562 alloc_spill_area (&off, 8, sr->curr.reg + UNW_REG_B1, in finish_prologue()
640 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR, in desc_br_gr()
655 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME, in desc_br_mem()
2016 case UNW_REG_B1 ... UNW_REG_B5: in uw_update_reg_address()
/dports/lang/gcc48/gcc-4.8.5/libgcc/config/ia64/
H A Dunwind-ia64.c91 UNW_REG_B0, UNW_REG_B1, enumerator
92 UNW_REG_B5 = UNW_REG_B1 + 4,
445 case 0x41 ... 0x45: return UNW_REG_B1 + (abreg - 0x41); in decode_abreg()
543 regs[2] = sr->curr.reg + UNW_REG_B1; in finish_prologue()
562 alloc_spill_area (&off, 8, sr->curr.reg + UNW_REG_B1, in finish_prologue()
640 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR, in desc_br_gr()
655 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME, in desc_br_mem()
2016 case UNW_REG_B1 ... UNW_REG_B5: in uw_update_reg_address()
/dports/lang/gcc10/gcc-10.3.0/libgcc/config/ia64/
H A Dunwind-ia64.c91 UNW_REG_B0, UNW_REG_B1, enumerator
92 UNW_REG_B5 = UNW_REG_B1 + 4,
445 case 0x41 ... 0x45: return UNW_REG_B1 + (abreg - 0x41); in decode_abreg()
543 regs[2] = sr->curr.reg + UNW_REG_B1; in finish_prologue()
562 alloc_spill_area (&off, 8, sr->curr.reg + UNW_REG_B1, in finish_prologue()
640 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR, in desc_br_gr()
655 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME, in desc_br_mem()
2016 case UNW_REG_B1 ... UNW_REG_B5: in uw_update_reg_address()
/dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/libgcc/config/ia64/
H A Dunwind-ia64.c91 UNW_REG_B0, UNW_REG_B1, enumerator
92 UNW_REG_B5 = UNW_REG_B1 + 4,
445 case 0x41 ... 0x45: return UNW_REG_B1 + (abreg - 0x41); in decode_abreg()
543 regs[2] = sr->curr.reg + UNW_REG_B1; in finish_prologue()
562 alloc_spill_area (&off, 8, sr->curr.reg + UNW_REG_B1, in finish_prologue()
640 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR, in desc_br_gr()
655 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME, in desc_br_mem()
2016 case UNW_REG_B1 ... UNW_REG_B5: in uw_update_reg_address()
/dports/lang/gcc12-devel/gcc-12-20211205/libgcc/config/ia64/
H A Dunwind-ia64.c91 UNW_REG_B0, UNW_REG_B1, enumerator
92 UNW_REG_B5 = UNW_REG_B1 + 4,
445 case 0x41 ... 0x45: return UNW_REG_B1 + (abreg - 0x41); in decode_abreg()
543 regs[2] = sr->curr.reg + UNW_REG_B1; in finish_prologue()
562 alloc_spill_area (&off, 8, sr->curr.reg + UNW_REG_B1, in finish_prologue()
640 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR, in desc_br_gr()
655 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME, in desc_br_mem()
2016 case UNW_REG_B1 ... UNW_REG_B5: in uw_update_reg_address()
/dports/devel/arm-none-eabi-gcc/gcc-8.4.0/libgcc/config/ia64/
H A Dunwind-ia64.c91 UNW_REG_B0, UNW_REG_B1, enumerator
92 UNW_REG_B5 = UNW_REG_B1 + 4,
445 case 0x41 ... 0x45: return UNW_REG_B1 + (abreg - 0x41); in decode_abreg()
543 regs[2] = sr->curr.reg + UNW_REG_B1; in finish_prologue()
562 alloc_spill_area (&off, 8, sr->curr.reg + UNW_REG_B1, in finish_prologue()
640 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR, in desc_br_gr()
655 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME, in desc_br_mem()
2016 case UNW_REG_B1 ... UNW_REG_B5: in uw_update_reg_address()
/dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/libgcc/config/ia64/
H A Dunwind-ia64.c91 UNW_REG_B0, UNW_REG_B1, enumerator
92 UNW_REG_B5 = UNW_REG_B1 + 4,
445 case 0x41 ... 0x45: return UNW_REG_B1 + (abreg - 0x41); in decode_abreg()
543 regs[2] = sr->curr.reg + UNW_REG_B1; in finish_prologue()
562 alloc_spill_area (&off, 8, sr->curr.reg + UNW_REG_B1, in finish_prologue()
640 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR, in desc_br_gr()
655 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME, in desc_br_mem()
2016 case UNW_REG_B1 ... UNW_REG_B5: in uw_update_reg_address()
/dports/lang/gcc9-devel/gcc-9-20211007/libgcc/config/ia64/
H A Dunwind-ia64.c91 UNW_REG_B0, UNW_REG_B1, enumerator
92 UNW_REG_B5 = UNW_REG_B1 + 4,
445 case 0x41 ... 0x45: return UNW_REG_B1 + (abreg - 0x41); in decode_abreg()
543 regs[2] = sr->curr.reg + UNW_REG_B1; in finish_prologue()
562 alloc_spill_area (&off, 8, sr->curr.reg + UNW_REG_B1, in finish_prologue()
640 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR, in desc_br_gr()
655 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME, in desc_br_mem()
2016 case UNW_REG_B1 ... UNW_REG_B5: in uw_update_reg_address()
/dports/devel/arm-none-eabi-gcc492/gcc-4.9.2/libgcc/config/ia64/
H A Dunwind-ia64.c91 UNW_REG_B0, UNW_REG_B1, enumerator
92 UNW_REG_B5 = UNW_REG_B1 + 4,
445 case 0x41 ... 0x45: return UNW_REG_B1 + (abreg - 0x41); in decode_abreg()
543 regs[2] = sr->curr.reg + UNW_REG_B1; in finish_prologue()
562 alloc_spill_area (&off, 8, sr->curr.reg + UNW_REG_B1, in finish_prologue()
640 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR, in desc_br_gr()
655 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME, in desc_br_mem()
2016 case UNW_REG_B1 ... UNW_REG_B5: in uw_update_reg_address()
/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/libgcc/config/ia64/
H A Dunwind-ia64.c91 UNW_REG_B0, UNW_REG_B1, enumerator
92 UNW_REG_B5 = UNW_REG_B1 + 4,
445 case 0x41 ... 0x45: return UNW_REG_B1 + (abreg - 0x41); in decode_abreg()
543 regs[2] = sr->curr.reg + UNW_REG_B1; in finish_prologue()
562 alloc_spill_area (&off, 8, sr->curr.reg + UNW_REG_B1, in finish_prologue()
640 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR, in desc_br_gr()
655 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME, in desc_br_mem()
2016 case UNW_REG_B1 ... UNW_REG_B5: in uw_update_reg_address()
/dports/lang/gcc11-devel/gcc-11-20211009/libgcc/config/ia64/
H A Dunwind-ia64.c91 UNW_REG_B0, UNW_REG_B1, enumerator
92 UNW_REG_B5 = UNW_REG_B1 + 4,
445 case 0x41 ... 0x45: return UNW_REG_B1 + (abreg - 0x41); in decode_abreg()
543 regs[2] = sr->curr.reg + UNW_REG_B1; in finish_prologue()
562 alloc_spill_area (&off, 8, sr->curr.reg + UNW_REG_B1, in finish_prologue()
640 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR, in desc_br_gr()
655 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME, in desc_br_mem()
2016 case UNW_REG_B1 ... UNW_REG_B5: in uw_update_reg_address()
/dports/misc/cxx_atomics_pic/gcc-11.2.0/libgcc/config/ia64/
H A Dunwind-ia64.c91 UNW_REG_B0, UNW_REG_B1, enumerator
92 UNW_REG_B5 = UNW_REG_B1 + 4,
445 case 0x41 ... 0x45: return UNW_REG_B1 + (abreg - 0x41); in decode_abreg()
543 regs[2] = sr->curr.reg + UNW_REG_B1; in finish_prologue()
562 alloc_spill_area (&off, 8, sr->curr.reg + UNW_REG_B1, in finish_prologue()
640 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR, in desc_br_gr()
655 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME, in desc_br_mem()
2016 case UNW_REG_B1 ... UNW_REG_B5: in uw_update_reg_address()
/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/gcc-4.1-20060728/gcc/config/ia64/
H A Dunwind-ia64.c102 UNW_REG_B0, UNW_REG_B1, enumerator
103 UNW_REG_B5 = UNW_REG_B1 + 4,
449 case 0x41 ... 0x45: return UNW_REG_B1 + (abreg - 0x41); in decode_abreg()
547 regs[2] = sr->curr.reg + UNW_REG_B1; in finish_prologue()
566 alloc_spill_area (&off, 8, sr->curr.reg + UNW_REG_B1, in finish_prologue()
644 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR, in desc_br_gr()
659 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME, in desc_br_mem()
1972 case UNW_REG_B1 ... UNW_REG_B5: in uw_update_reg_address()
/dports/devel/riscv64-gcc/gcc-8.3.0/libgcc/config/ia64/
H A Dunwind-ia64.c91 UNW_REG_B0, UNW_REG_B1, enumerator
92 UNW_REG_B5 = UNW_REG_B1 + 4,
445 case 0x41 ... 0x45: return UNW_REG_B1 + (abreg - 0x41); in decode_abreg()
543 regs[2] = sr->curr.reg + UNW_REG_B1; in finish_prologue()
562 alloc_spill_area (&off, 8, sr->curr.reg + UNW_REG_B1, in finish_prologue()
640 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR, in desc_br_gr()
655 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME, in desc_br_mem()
2016 case UNW_REG_B1 ... UNW_REG_B5: in uw_update_reg_address()
/dports/lang/gnat_util/gcc-6-20180516/libgcc/config/ia64/
H A Dunwind-ia64.c91 UNW_REG_B0, UNW_REG_B1, enumerator
92 UNW_REG_B5 = UNW_REG_B1 + 4,
445 case 0x41 ... 0x45: return UNW_REG_B1 + (abreg - 0x41); in decode_abreg()
543 regs[2] = sr->curr.reg + UNW_REG_B1; in finish_prologue()
562 alloc_spill_area (&off, 8, sr->curr.reg + UNW_REG_B1, in finish_prologue()
640 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR, in desc_br_gr()
655 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME, in desc_br_mem()
2016 case UNW_REG_B1 ... UNW_REG_B5: in uw_update_reg_address()
/dports/devel/avr-gcc/gcc-10.2.0/libgcc/config/ia64/
H A Dunwind-ia64.c91 UNW_REG_B0, UNW_REG_B1, enumerator
92 UNW_REG_B5 = UNW_REG_B1 + 4,
445 case 0x41 ... 0x45: return UNW_REG_B1 + (abreg - 0x41); in decode_abreg()
543 regs[2] = sr->curr.reg + UNW_REG_B1; in finish_prologue()
562 alloc_spill_area (&off, 8, sr->curr.reg + UNW_REG_B1, in finish_prologue()
640 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR, in desc_br_gr()
655 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME, in desc_br_mem()
2016 case UNW_REG_B1 ... UNW_REG_B5: in uw_update_reg_address()
/dports/lang/gcc11/gcc-11.2.0/libgcc/config/ia64/
H A Dunwind-ia64.c91 UNW_REG_B0, UNW_REG_B1, enumerator
92 UNW_REG_B5 = UNW_REG_B1 + 4,
445 case 0x41 ... 0x45: return UNW_REG_B1 + (abreg - 0x41); in decode_abreg()
543 regs[2] = sr->curr.reg + UNW_REG_B1; in finish_prologue()
562 alloc_spill_area (&off, 8, sr->curr.reg + UNW_REG_B1, in finish_prologue()
640 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR, in desc_br_gr()
655 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME, in desc_br_mem()
2016 case UNW_REG_B1 ... UNW_REG_B5: in uw_update_reg_address()
/dports/lang/gcc10-devel/gcc-10-20211008/libgcc/config/ia64/
H A Dunwind-ia64.c91 UNW_REG_B0, UNW_REG_B1,
92 UNW_REG_B5 = UNW_REG_B1 + 4,
445 case 0x41 ... 0x45: return UNW_REG_B1 + (abreg - 0x41);
543 regs[2] = sr->curr.reg + UNW_REG_B1;
562 alloc_spill_area (&off, 8, sr->curr.reg + UNW_REG_B1,
640 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR,
655 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME,
2016 case UNW_REG_B1 ... UNW_REG_B5:
/dports/lang/gcc9/gcc-9.4.0/libgcc/config/ia64/
H A Dunwind-ia64.c91 UNW_REG_B0, UNW_REG_B1, enumerator
92 UNW_REG_B5 = UNW_REG_B1 + 4,
445 case 0x41 ... 0x45: return UNW_REG_B1 + (abreg - 0x41); in decode_abreg()
543 regs[2] = sr->curr.reg + UNW_REG_B1; in finish_prologue()
562 alloc_spill_area (&off, 8, sr->curr.reg + UNW_REG_B1, in finish_prologue()
640 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR, in desc_br_gr()
655 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME, in desc_br_mem()
2016 case UNW_REG_B1 ... UNW_REG_B5: in uw_update_reg_address()

12