/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/ |
H A D | uvd_v5_0.c | 663 (1 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_GATE_DLY_TIMER)) | in uvd_v5_0_set_sw_clock_gating() 664 (4 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_OFF_DELAY)); in uvd_v5_0_set_sw_clock_gating()
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H A D | uvd_v6_0.c | 1327 (1 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_GATE_DLY_TIMER)) | in uvd_v6_0_set_sw_clock_gating() 1328 (4 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_OFF_DELAY)); in uvd_v6_0_set_sw_clock_gating()
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H A D | uvd_v7_0.c | 1607 (1 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_GATE_DLY_TIMER)) | 1608 (4 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_OFF_DELAY));
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H A D | sid.h | 1630 #define UVD_CGC_CTRL 0x3dc2 macro
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/ |
H A D | uvd_v5_0.c | 663 (1 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_GATE_DLY_TIMER)) | in uvd_v5_0_set_sw_clock_gating() 664 (4 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_OFF_DELAY)); in uvd_v5_0_set_sw_clock_gating()
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H A D | uvd_v6_0.c | 1327 (1 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_GATE_DLY_TIMER)) | in uvd_v6_0_set_sw_clock_gating() 1328 (4 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_OFF_DELAY)); in uvd_v6_0_set_sw_clock_gating()
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H A D | uvd_v7_0.c | 1607 (1 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_GATE_DLY_TIMER)) | 1608 (4 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_OFF_DELAY));
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H A D | sid.h | 1630 #define UVD_CGC_CTRL 0x3dc2 macro
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/ |
H A D | uvd_v5_0.c | 663 (1 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_GATE_DLY_TIMER)) | in uvd_v5_0_set_sw_clock_gating() 664 (4 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_OFF_DELAY)); in uvd_v5_0_set_sw_clock_gating()
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H A D | uvd_v6_0.c | 1327 (1 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_GATE_DLY_TIMER)) | in uvd_v6_0_set_sw_clock_gating() 1328 (4 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_OFF_DELAY)); in uvd_v6_0_set_sw_clock_gating()
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H A D | uvd_v7_0.c | 1607 (1 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_GATE_DLY_TIMER)) | 1608 (4 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_OFF_DELAY));
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H A D | sid.h | 1630 #define UVD_CGC_CTRL 0x3dc2 macro
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/dports/misc/rump/buildrump.sh-b914579/src/sys/external/bsd/drm2/dist/drm/radeon/ |
H A D | si.c | 4910 tmp = RREG32(UVD_CGC_CTRL); in si_set_uvd_dcm() 4922 WREG32(UVD_CGC_CTRL, tmp); in si_set_uvd_dcm() 4933 u32 tmp = RREG32(UVD_CGC_CTRL); in si_init_uvd_internal_cg() 4935 WREG32(UVD_CGC_CTRL, tmp); in si_init_uvd_internal_cg() 5195 orig = data = RREG32(UVD_CGC_CTRL); in si_enable_uvd_mgcg() 5198 WREG32(UVD_CGC_CTRL, data); in si_enable_uvd_mgcg() 5207 orig = data = RREG32(UVD_CGC_CTRL); in si_enable_uvd_mgcg() 5210 WREG32(UVD_CGC_CTRL, data); in si_enable_uvd_mgcg()
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H A D | sid.h | 1507 #define UVD_CGC_CTRL 0xF4B0 macro
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H A D | cikd.h | 2008 #define UVD_CGC_CTRL 0xF4B0 macro
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H A D | cik.c | 6155 orig = data = RREG32(UVD_CGC_CTRL); in cik_enable_uvd_mgcg() 6158 WREG32(UVD_CGC_CTRL, data); in cik_enable_uvd_mgcg() 6164 orig = data = RREG32(UVD_CGC_CTRL); in cik_enable_uvd_mgcg() 6167 WREG32(UVD_CGC_CTRL, data); in cik_enable_uvd_mgcg()
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/radeon/ |
H A D | si.c | 5171 tmp = RREG32(UVD_CGC_CTRL); in si_set_uvd_dcm() 5183 WREG32(UVD_CGC_CTRL, tmp); in si_set_uvd_dcm() 5194 u32 tmp = RREG32(UVD_CGC_CTRL); in si_init_uvd_internal_cg() 5196 WREG32(UVD_CGC_CTRL, tmp); in si_init_uvd_internal_cg() 5456 orig = data = RREG32(UVD_CGC_CTRL); in si_enable_uvd_mgcg() 5459 WREG32(UVD_CGC_CTRL, data); in si_enable_uvd_mgcg() 5468 orig = data = RREG32(UVD_CGC_CTRL); in si_enable_uvd_mgcg() 5471 WREG32(UVD_CGC_CTRL, data); in si_enable_uvd_mgcg()
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H A D | sid.h | 1568 #define UVD_CGC_CTRL 0xF4B0 macro
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H A D | cikd.h | 2085 #define UVD_CGC_CTRL 0xF4B0 macro
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/radeon/ |
H A D | si.c | 5171 tmp = RREG32(UVD_CGC_CTRL); in si_set_uvd_dcm() 5183 WREG32(UVD_CGC_CTRL, tmp); in si_set_uvd_dcm() 5194 u32 tmp = RREG32(UVD_CGC_CTRL); in si_init_uvd_internal_cg() 5196 WREG32(UVD_CGC_CTRL, tmp); in si_init_uvd_internal_cg() 5456 orig = data = RREG32(UVD_CGC_CTRL); in si_enable_uvd_mgcg() 5459 WREG32(UVD_CGC_CTRL, data); in si_enable_uvd_mgcg() 5468 orig = data = RREG32(UVD_CGC_CTRL); in si_enable_uvd_mgcg() 5471 WREG32(UVD_CGC_CTRL, data); in si_enable_uvd_mgcg()
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H A D | sid.h | 1568 #define UVD_CGC_CTRL 0xF4B0 macro
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H A D | cikd.h | 2085 #define UVD_CGC_CTRL 0xF4B0 macro
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/radeon/ |
H A D | si.c | 5171 tmp = RREG32(UVD_CGC_CTRL); in si_set_uvd_dcm() 5183 WREG32(UVD_CGC_CTRL, tmp); in si_set_uvd_dcm() 5194 u32 tmp = RREG32(UVD_CGC_CTRL); in si_init_uvd_internal_cg() 5196 WREG32(UVD_CGC_CTRL, tmp); in si_init_uvd_internal_cg() 5456 orig = data = RREG32(UVD_CGC_CTRL); in si_enable_uvd_mgcg() 5459 WREG32(UVD_CGC_CTRL, data); in si_enable_uvd_mgcg() 5468 orig = data = RREG32(UVD_CGC_CTRL); in si_enable_uvd_mgcg() 5471 WREG32(UVD_CGC_CTRL, data); in si_enable_uvd_mgcg()
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H A D | sid.h | 1568 #define UVD_CGC_CTRL 0xF4B0 macro
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H A D | cikd.h | 2085 #define UVD_CGC_CTRL 0xF4B0 macro
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