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Searched refs:VI_VFP_VV_LOOP_WIDE (Results 1 – 8 of 8) sorted by relevance

/dports/emulators/riscv-isa-sim/riscv-isa-sim-4f12984/riscv/insns/
H A Dvfwadd_vv.h2 VI_VFP_VV_LOOP_WIDE
H A Dvfwmul_vv.h2 VI_VFP_VV_LOOP_WIDE
H A Dvfwsub_vv.h2 VI_VFP_VV_LOOP_WIDE
H A Dvfwmacc_vv.h2 VI_VFP_VV_LOOP_WIDE
H A Dvfwmsac_vv.h2 VI_VFP_VV_LOOP_WIDE
H A Dvfwnmsac_vv.h2 VI_VFP_VV_LOOP_WIDE
H A Dvfwnmacc_vv.h2 VI_VFP_VV_LOOP_WIDE
/dports/emulators/riscv-isa-sim/riscv-isa-sim-4f12984/riscv/
H A Ddecode.h2177 #define VI_VFP_VV_LOOP_WIDE(BODY16, BODY32) \ macro