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Searched refs:VLSTM (Results 1 – 25 of 134) sorted by relevance

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/dports/emulators/qemu5/qemu-5.2.0/target/arm/
H A Dm-nocp.decode24 # VLLDM and VLSTM. (Compare v8.1M IsCPInstruction() pseudocode and
35 # Special cases which do not take an early NOCP: VLLDM and VLSTM
/dports/emulators/qemu60/qemu-6.0.0/target/arm/
H A Dm-nocp.decode24 # VLLDM and VLSTM. (Compare v8.1M IsCPInstruction() pseudocode and
38 # Special cases which do not take an early NOCP: VLLDM and VLSTM
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/arm/
H A Dm-nocp.decode24 # VLLDM and VLSTM. (Compare v8.1M IsCPInstruction() pseudocode and
46 # Special cases which do not take an early NOCP: VLLDM and VLSTM
/dports/emulators/qemu/qemu-6.2.0/target/arm/
H A Dm-nocp.decode24 # VLLDM and VLSTM. (Compare v8.1M IsCPInstruction() pseudocode and
46 # Special cases which do not take an early NOCP: VLLDM and VLSTM
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/ARM/
H A Dvlldm-vlstm-uops.mir63 VLSTM $sp, 14, $noreg
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/ARM/
H A Dvlldm-vlstm-uops.mir63 VLSTM $sp, 14, $noreg
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/ARM/
H A Dvlldm-vlstm-uops.mir63 VLSTM $sp, 14, $noreg
H A Dcmse-clear-float-bigend.mir96 # CHECK: VLSTM
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/ARM/
H A Dvlldm-vlstm-uops.mir63 VLSTM $sp, 14, $noreg
H A Dcmse-clear-float-bigend.mir96 # CHECK: VLSTM
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/ARM/
H A Dvlldm-vlstm-uops.mir63 VLSTM $sp, 14, $noreg
H A Dcmse-clear-float-bigend.mir96 # CHECK: VLSTM
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/ARM/
H A Dvlldm-vlstm-uops.mir63 VLSTM $sp, 14, $noreg
H A Dcmse-clear-float-bigend.mir96 # CHECK: VLSTM
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/ARM/
H A Dvlldm-vlstm-uops.mir63 VLSTM $sp, 14, $noreg
H A Dcmse-clear-float-bigend.mir96 # CHECK: VLSTM
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/ARM/
H A Dvlldm-vlstm-uops.mir63 VLSTM $sp, 14, $noreg
H A Dcmse-clear-float-bigend.mir96 # CHECK: VLSTM
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/ARM/
H A Dvlldm-vlstm-uops.mir63 VLSTM $sp, 14, $noreg
H A Dcmse-clear-float-bigend.mir96 # CHECK: VLSTM
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/test/CodeGen/ARM/
H A Dvlldm-vlstm-uops.mir63 VLSTM $sp, 14, $noreg
H A Dcmse-clear-float-bigend.mir96 # CHECK: VLSTM
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/ARM/
H A Dvlldm-vlstm-uops.mir63 VLSTM $sp, 14, $noreg
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/ARM/
H A Dvlldm-vlstm-uops.mir63 VLSTM $sp, 14, $noreg
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/ARM/
H A Dvlldm-vlstm-uops.mir63 VLSTM $sp, 14, $noreg

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