/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/riscv/ |
H A D | helper.c | 124 case VM_1_10_MBARE: in get_physical_address() 283 get_field(env->satp, SATP_MODE) != VM_1_10_MBARE; in raise_mmu_exception()
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H A D | op_helper.c | 35 [VM_1_10_MBARE] = 1, 45 [VM_1_10_MBARE] = 1,
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H A D | cpu_bits.h | 329 #define VM_1_10_MBARE 0 macro
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/dports/emulators/qemu5/qemu-5.2.0/target/riscv/ |
H A D | cpu_helper.c | 380 case VM_1_10_MBARE: in get_physical_address() 568 get_field(env->satp, SATP_MODE) != VM_1_10_MBARE && in raise_mmu_exception() 572 get_field(env->hgatp, HGATP_MODE) != VM_1_10_MBARE && in raise_mmu_exception()
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H A D | cpu_bits.h | 503 #define VM_1_10_MBARE 0 macro
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H A D | csr.c | 411 [VM_1_10_MBARE] = 1, 416 [VM_1_10_MBARE] = 1,
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/riscv/ |
H A D | cpu_helper.c | 392 case VM_1_10_MBARE: in get_physical_address() 596 get_field(env->satp, SATP_MODE) != VM_1_10_MBARE && in raise_mmu_exception() 600 get_field(env->hgatp, HGATP_MODE) != VM_1_10_MBARE && in raise_mmu_exception()
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H A D | cpu_bits.h | 486 #define VM_1_10_MBARE 0 macro
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H A D | csr.c | 312 [VM_1_10_MBARE] = 1, 322 [VM_1_10_MBARE] = 1,
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/dports/emulators/qemu-utils/qemu-4.2.1/target/riscv/ |
H A D | cpu_helper.c | 195 case VM_1_10_MBARE: in get_physical_address() 365 get_field(env->satp, SATP_MODE) != VM_1_10_MBARE && in raise_mmu_exception()
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H A D | cpu_bits.h | 455 #define VM_1_10_MBARE 0 macro
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H A D | csr.c | 264 [VM_1_10_MBARE] = 1, 274 [VM_1_10_MBARE] = 1,
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/dports/emulators/qemu42/qemu-4.2.1/target/riscv/ |
H A D | cpu_helper.c | 195 case VM_1_10_MBARE: in get_physical_address() 365 get_field(env->satp, SATP_MODE) != VM_1_10_MBARE && in raise_mmu_exception()
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H A D | cpu_bits.h | 455 #define VM_1_10_MBARE 0 macro
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H A D | csr.c | 264 [VM_1_10_MBARE] = 1, 274 [VM_1_10_MBARE] = 1,
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/dports/emulators/qemu60/qemu-6.0.0/target/riscv/ |
H A D | cpu_helper.c | 429 case VM_1_10_MBARE: in get_physical_address() 621 get_field(env->satp, SATP_MODE) != VM_1_10_MBARE && in raise_mmu_exception() 625 get_field(env->hgatp, HGATP_MODE) != VM_1_10_MBARE && in raise_mmu_exception()
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H A D | cpu_bits.h | 502 #define VM_1_10_MBARE 0 macro
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H A D | csr.c | 428 [VM_1_10_MBARE] = 1, 433 [VM_1_10_MBARE] = 1,
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/riscv/ |
H A D | cpu_bits.h | 439 #define VM_1_10_MBARE 0 macro
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H A D | cpu_helper.c | 442 case VM_1_10_MBARE: in get_physical_address() 647 page_fault_exceptions = vm != VM_1_10_MBARE && !pmp_violation; in raise_mmu_exception()
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/riscv/ |
H A D | cpu_helper.c | 417 case VM_1_10_MBARE: in get_physical_address() 621 get_field(env->satp, SATP_MODE) != VM_1_10_MBARE && in raise_mmu_exception() 625 get_field(env->hgatp, HGATP_MODE) != VM_1_10_MBARE && in raise_mmu_exception()
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H A D | cpu_bits.h | 492 #define VM_1_10_MBARE 0 macro
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H A D | csr.c | 323 [VM_1_10_MBARE] = 1, 333 [VM_1_10_MBARE] = 1,
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/dports/emulators/qemu/qemu-6.2.0/target/riscv/ |
H A D | cpu_bits.h | 459 #define VM_1_10_MBARE 0 macro
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H A D | cpu_helper.c | 508 case VM_1_10_MBARE: in get_physical_address() 713 page_fault_exceptions = vm != VM_1_10_MBARE && !pmp_violation; in raise_mmu_exception()
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