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Searched refs:VSX_ADD_SUB (Results 1 – 9 of 9) sorted by relevance

/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/ppc/
H A Dfpu_helper.c1603 #define VSX_ADD_SUB(name, op, nels, tp, fld, sfprf, r2sp) \
1636 VSX_ADD_SUB(xsadddp, add, 1, float64, VsrD(0), 1, 0)
1637 VSX_ADD_SUB(xsaddsp, add, 1, float64, VsrD(0), 1, 1)
1638 VSX_ADD_SUB(xvadddp, add, 2, float64, VsrD(i), 0, 0)
1639 VSX_ADD_SUB(xvaddsp, add, 4, float32, VsrW(i), 0, 0)
1640 VSX_ADD_SUB(xssubdp, sub, 1, float64, VsrD(0), 1, 0)
1641 VSX_ADD_SUB(xssubsp, sub, 1, float64, VsrD(0), 1, 1)
1642 VSX_ADD_SUB(xvsubdp, sub, 2, float64, VsrD(i), 0, 0)
1643 VSX_ADD_SUB(xvsubsp, sub, 4, float32, VsrW(i), 0, 0)
/dports/emulators/qemu/qemu-6.2.0/target/ppc/
H A Dfpu_helper.c1603 #define VSX_ADD_SUB(name, op, nels, tp, fld, sfprf, r2sp) \ macro
1636 VSX_ADD_SUB(xsadddp, add, 1, float64, VsrD(0), 1, 0)
1637 VSX_ADD_SUB(xsaddsp, add, 1, float64, VsrD(0), 1, 1)
1638 VSX_ADD_SUB(xvadddp, add, 2, float64, VsrD(i), 0, 0)
1639 VSX_ADD_SUB(xvaddsp, add, 4, float32, VsrW(i), 0, 0)
1640 VSX_ADD_SUB(xssubdp, sub, 1, float64, VsrD(0), 1, 0)
1641 VSX_ADD_SUB(xssubsp, sub, 1, float64, VsrD(0), 1, 1)
1642 VSX_ADD_SUB(xvsubdp, sub, 2, float64, VsrD(i), 0, 0)
1643 VSX_ADD_SUB(xvsubsp, sub, 4, float32, VsrW(i), 0, 0)
/dports/emulators/qemu-utils/qemu-4.2.1/target/ppc/
H A Dfpu_helper.c1815 #define VSX_ADD_SUB(name, op, nels, tp, fld, sfprf, r2sp) \ macro
1848 VSX_ADD_SUB(xsadddp, add, 1, float64, VsrD(0), 1, 0)
1849 VSX_ADD_SUB(xsaddsp, add, 1, float64, VsrD(0), 1, 1)
1850 VSX_ADD_SUB(xvadddp, add, 2, float64, VsrD(i), 0, 0)
1851 VSX_ADD_SUB(xvaddsp, add, 4, float32, VsrW(i), 0, 0)
1852 VSX_ADD_SUB(xssubdp, sub, 1, float64, VsrD(0), 1, 0)
1853 VSX_ADD_SUB(xssubsp, sub, 1, float64, VsrD(0), 1, 1)
1854 VSX_ADD_SUB(xvsubdp, sub, 2, float64, VsrD(i), 0, 0)
1855 VSX_ADD_SUB(xvsubsp, sub, 4, float32, VsrW(i), 0, 0)
/dports/emulators/qemu5/qemu-5.2.0/target/ppc/
H A Dfpu_helper.c1815 #define VSX_ADD_SUB(name, op, nels, tp, fld, sfprf, r2sp) \ macro
1848 VSX_ADD_SUB(xsadddp, add, 1, float64, VsrD(0), 1, 0)
1849 VSX_ADD_SUB(xsaddsp, add, 1, float64, VsrD(0), 1, 1)
1850 VSX_ADD_SUB(xvadddp, add, 2, float64, VsrD(i), 0, 0)
1851 VSX_ADD_SUB(xvaddsp, add, 4, float32, VsrW(i), 0, 0)
1852 VSX_ADD_SUB(xssubdp, sub, 1, float64, VsrD(0), 1, 0)
1853 VSX_ADD_SUB(xssubsp, sub, 1, float64, VsrD(0), 1, 1)
1854 VSX_ADD_SUB(xvsubdp, sub, 2, float64, VsrD(i), 0, 0)
1855 VSX_ADD_SUB(xvsubsp, sub, 4, float32, VsrW(i), 0, 0)
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/ppc/
H A Dfpu_helper.c1815 #define VSX_ADD_SUB(name, op, nels, tp, fld, sfprf, r2sp) \ macro
1848 VSX_ADD_SUB(xsadddp, add, 1, float64, VsrD(0), 1, 0)
1849 VSX_ADD_SUB(xsaddsp, add, 1, float64, VsrD(0), 1, 1)
1850 VSX_ADD_SUB(xvadddp, add, 2, float64, VsrD(i), 0, 0)
1851 VSX_ADD_SUB(xvaddsp, add, 4, float32, VsrW(i), 0, 0)
1852 VSX_ADD_SUB(xssubdp, sub, 1, float64, VsrD(0), 1, 0)
1853 VSX_ADD_SUB(xssubsp, sub, 1, float64, VsrD(0), 1, 1)
1854 VSX_ADD_SUB(xvsubdp, sub, 2, float64, VsrD(i), 0, 0)
1855 VSX_ADD_SUB(xvsubsp, sub, 4, float32, VsrW(i), 0, 0)
/dports/emulators/qemu42/qemu-4.2.1/target/ppc/
H A Dfpu_helper.c1815 #define VSX_ADD_SUB(name, op, nels, tp, fld, sfprf, r2sp) \ macro
1848 VSX_ADD_SUB(xsadddp, add, 1, float64, VsrD(0), 1, 0)
1849 VSX_ADD_SUB(xsaddsp, add, 1, float64, VsrD(0), 1, 1)
1850 VSX_ADD_SUB(xvadddp, add, 2, float64, VsrD(i), 0, 0)
1851 VSX_ADD_SUB(xvaddsp, add, 4, float32, VsrW(i), 0, 0)
1852 VSX_ADD_SUB(xssubdp, sub, 1, float64, VsrD(0), 1, 0)
1853 VSX_ADD_SUB(xssubsp, sub, 1, float64, VsrD(0), 1, 1)
1854 VSX_ADD_SUB(xvsubdp, sub, 2, float64, VsrD(i), 0, 0)
1855 VSX_ADD_SUB(xvsubsp, sub, 4, float32, VsrW(i), 0, 0)
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/ppc/
H A Dfpu_helper.c1815 #define VSX_ADD_SUB(name, op, nels, tp, fld, sfprf, r2sp) \ macro
1848 VSX_ADD_SUB(xsadddp, add, 1, float64, VsrD(0), 1, 0)
1849 VSX_ADD_SUB(xsaddsp, add, 1, float64, VsrD(0), 1, 1)
1850 VSX_ADD_SUB(xvadddp, add, 2, float64, VsrD(i), 0, 0)
1851 VSX_ADD_SUB(xvaddsp, add, 4, float32, VsrW(i), 0, 0)
1852 VSX_ADD_SUB(xssubdp, sub, 1, float64, VsrD(0), 1, 0)
1853 VSX_ADD_SUB(xssubsp, sub, 1, float64, VsrD(0), 1, 1)
1854 VSX_ADD_SUB(xvsubdp, sub, 2, float64, VsrD(i), 0, 0)
1855 VSX_ADD_SUB(xvsubsp, sub, 4, float32, VsrW(i), 0, 0)
/dports/emulators/qemu60/qemu-6.0.0/target/ppc/
H A Dfpu_helper.c1815 #define VSX_ADD_SUB(name, op, nels, tp, fld, sfprf, r2sp) \ macro
1848 VSX_ADD_SUB(xsadddp, add, 1, float64, VsrD(0), 1, 0)
1849 VSX_ADD_SUB(xsaddsp, add, 1, float64, VsrD(0), 1, 1)
1850 VSX_ADD_SUB(xvadddp, add, 2, float64, VsrD(i), 0, 0)
1851 VSX_ADD_SUB(xvaddsp, add, 4, float32, VsrW(i), 0, 0)
1852 VSX_ADD_SUB(xssubdp, sub, 1, float64, VsrD(0), 1, 0)
1853 VSX_ADD_SUB(xssubsp, sub, 1, float64, VsrD(0), 1, 1)
1854 VSX_ADD_SUB(xvsubdp, sub, 2, float64, VsrD(i), 0, 0)
1855 VSX_ADD_SUB(xvsubsp, sub, 4, float32, VsrW(i), 0, 0)
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/ppc/
H A Dfpu_helper.c1800 #define VSX_ADD_SUB(name, op, nels, tp, fld, sfprf, r2sp) \ macro
1835 VSX_ADD_SUB(xsadddp, add, 1, float64, VsrD(0), 1, 0)
1836 VSX_ADD_SUB(xsaddsp, add, 1, float64, VsrD(0), 1, 1)
1837 VSX_ADD_SUB(xvadddp, add, 2, float64, VsrD(i), 0, 0)
1838 VSX_ADD_SUB(xvaddsp, add, 4, float32, VsrW(i), 0, 0)
1839 VSX_ADD_SUB(xssubdp, sub, 1, float64, VsrD(0), 1, 0)
1840 VSX_ADD_SUB(xssubsp, sub, 1, float64, VsrD(0), 1, 1)
1841 VSX_ADD_SUB(xvsubdp, sub, 2, float64, VsrD(i), 0, 0)
1842 VSX_ADD_SUB(xvsubsp, sub, 4, float32, VsrW(i), 0, 0)