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Searched refs:VSX_MUL (Results 1 – 9 of 9) sorted by relevance

/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/ppc/
H A Dfpu_helper.c1682 #define VSX_MUL(op, nels, tp, fld, sfprf, r2sp) \
1716 VSX_MUL(xsmuldp, 1, float64, VsrD(0), 1, 0)
1717 VSX_MUL(xsmulsp, 1, float64, VsrD(0), 1, 1)
1718 VSX_MUL(xvmuldp, 2, float64, VsrD(i), 0, 0)
1719 VSX_MUL(xvmulsp, 4, float32, VsrW(i), 0, 0)
/dports/emulators/qemu/qemu-6.2.0/target/ppc/
H A Dfpu_helper.c1682 #define VSX_MUL(op, nels, tp, fld, sfprf, r2sp) \ macro
1716 VSX_MUL(xsmuldp, 1, float64, VsrD(0), 1, 0)
1717 VSX_MUL(xsmulsp, 1, float64, VsrD(0), 1, 1)
1718 VSX_MUL(xvmuldp, 2, float64, VsrD(i), 0, 0)
1719 VSX_MUL(xvmulsp, 4, float32, VsrW(i), 0, 0)
/dports/emulators/qemu-utils/qemu-4.2.1/target/ppc/
H A Dfpu_helper.c1894 #define VSX_MUL(op, nels, tp, fld, sfprf, r2sp) \ macro
1928 VSX_MUL(xsmuldp, 1, float64, VsrD(0), 1, 0)
1929 VSX_MUL(xsmulsp, 1, float64, VsrD(0), 1, 1)
1930 VSX_MUL(xvmuldp, 2, float64, VsrD(i), 0, 0)
1931 VSX_MUL(xvmulsp, 4, float32, VsrW(i), 0, 0)
/dports/emulators/qemu5/qemu-5.2.0/target/ppc/
H A Dfpu_helper.c1894 #define VSX_MUL(op, nels, tp, fld, sfprf, r2sp) \ macro
1928 VSX_MUL(xsmuldp, 1, float64, VsrD(0), 1, 0)
1929 VSX_MUL(xsmulsp, 1, float64, VsrD(0), 1, 1)
1930 VSX_MUL(xvmuldp, 2, float64, VsrD(i), 0, 0)
1931 VSX_MUL(xvmulsp, 4, float32, VsrW(i), 0, 0)
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/ppc/
H A Dfpu_helper.c1894 #define VSX_MUL(op, nels, tp, fld, sfprf, r2sp) \ macro
1928 VSX_MUL(xsmuldp, 1, float64, VsrD(0), 1, 0)
1929 VSX_MUL(xsmulsp, 1, float64, VsrD(0), 1, 1)
1930 VSX_MUL(xvmuldp, 2, float64, VsrD(i), 0, 0)
1931 VSX_MUL(xvmulsp, 4, float32, VsrW(i), 0, 0)
/dports/emulators/qemu42/qemu-4.2.1/target/ppc/
H A Dfpu_helper.c1894 #define VSX_MUL(op, nels, tp, fld, sfprf, r2sp) \ macro
1928 VSX_MUL(xsmuldp, 1, float64, VsrD(0), 1, 0)
1929 VSX_MUL(xsmulsp, 1, float64, VsrD(0), 1, 1)
1930 VSX_MUL(xvmuldp, 2, float64, VsrD(i), 0, 0)
1931 VSX_MUL(xvmulsp, 4, float32, VsrW(i), 0, 0)
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/ppc/
H A Dfpu_helper.c1894 #define VSX_MUL(op, nels, tp, fld, sfprf, r2sp) \ macro
1928 VSX_MUL(xsmuldp, 1, float64, VsrD(0), 1, 0)
1929 VSX_MUL(xsmulsp, 1, float64, VsrD(0), 1, 1)
1930 VSX_MUL(xvmuldp, 2, float64, VsrD(i), 0, 0)
1931 VSX_MUL(xvmulsp, 4, float32, VsrW(i), 0, 0)
/dports/emulators/qemu60/qemu-6.0.0/target/ppc/
H A Dfpu_helper.c1894 #define VSX_MUL(op, nels, tp, fld, sfprf, r2sp) \ macro
1928 VSX_MUL(xsmuldp, 1, float64, VsrD(0), 1, 0)
1929 VSX_MUL(xsmulsp, 1, float64, VsrD(0), 1, 1)
1930 VSX_MUL(xvmuldp, 2, float64, VsrD(i), 0, 0)
1931 VSX_MUL(xvmulsp, 4, float32, VsrW(i), 0, 0)
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/ppc/
H A Dfpu_helper.c1882 #define VSX_MUL(op, nels, tp, fld, sfprf, r2sp) \ macro
1918 VSX_MUL(xsmuldp, 1, float64, VsrD(0), 1, 0)
1919 VSX_MUL(xsmulsp, 1, float64, VsrD(0), 1, 1)
1920 VSX_MUL(xvmuldp, 2, float64, VsrD(i), 0, 0)
1921 VSX_MUL(xvmulsp, 4, float32, VsrW(i), 0, 0)