| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/ppc/ |
| H A D | fpu_helper.c | 1975 #define VSX_TDIV(op, nels, tp, fld, emin, emax, nbits) \
2018 VSX_TDIV(xstdivdp, 1, float64, VsrD(0), -1022, 1023, 52)
2019 VSX_TDIV(xvtdivdp, 2, float64, VsrD(i), -1022, 1023, 52)
2020 VSX_TDIV(xvtdivsp, 4, float32, VsrW(i), -126, 127, 23)
|
| /dports/emulators/qemu/qemu-6.2.0/target/ppc/ |
| H A D | fpu_helper.c | 1975 #define VSX_TDIV(op, nels, tp, fld, emin, emax, nbits) \ macro
2018 VSX_TDIV(xstdivdp, 1, float64, VsrD(0), -1022, 1023, 52)
2019 VSX_TDIV(xvtdivdp, 2, float64, VsrD(i), -1022, 1023, 52)
2020 VSX_TDIV(xvtdivsp, 4, float32, VsrW(i), -126, 127, 23)
|
| /dports/emulators/qemu-utils/qemu-4.2.1/target/ppc/ |
| H A D | fpu_helper.c | 2187 #define VSX_TDIV(op, nels, tp, fld, emin, emax, nbits) \ macro
2230 VSX_TDIV(xstdivdp, 1, float64, VsrD(0), -1022, 1023, 52)
2231 VSX_TDIV(xvtdivdp, 2, float64, VsrD(i), -1022, 1023, 52)
2232 VSX_TDIV(xvtdivsp, 4, float32, VsrW(i), -126, 127, 23)
|
| /dports/emulators/qemu5/qemu-5.2.0/target/ppc/ |
| H A D | fpu_helper.c | 2187 #define VSX_TDIV(op, nels, tp, fld, emin, emax, nbits) \ macro
2230 VSX_TDIV(xstdivdp, 1, float64, VsrD(0), -1022, 1023, 52)
2231 VSX_TDIV(xvtdivdp, 2, float64, VsrD(i), -1022, 1023, 52)
2232 VSX_TDIV(xvtdivsp, 4, float32, VsrW(i), -126, 127, 23)
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/target/ppc/ |
| H A D | fpu_helper.c | 2187 #define VSX_TDIV(op, nels, tp, fld, emin, emax, nbits) \ macro
2230 VSX_TDIV(xstdivdp, 1, float64, VsrD(0), -1022, 1023, 52)
2231 VSX_TDIV(xvtdivdp, 2, float64, VsrD(i), -1022, 1023, 52)
2232 VSX_TDIV(xvtdivsp, 4, float32, VsrW(i), -126, 127, 23)
|
| /dports/emulators/qemu42/qemu-4.2.1/target/ppc/ |
| H A D | fpu_helper.c | 2187 #define VSX_TDIV(op, nels, tp, fld, emin, emax, nbits) \ macro
2230 VSX_TDIV(xstdivdp, 1, float64, VsrD(0), -1022, 1023, 52)
2231 VSX_TDIV(xvtdivdp, 2, float64, VsrD(i), -1022, 1023, 52)
2232 VSX_TDIV(xvtdivsp, 4, float32, VsrW(i), -126, 127, 23)
|
| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/ppc/ |
| H A D | fpu_helper.c | 2187 #define VSX_TDIV(op, nels, tp, fld, emin, emax, nbits) \ macro
2230 VSX_TDIV(xstdivdp, 1, float64, VsrD(0), -1022, 1023, 52)
2231 VSX_TDIV(xvtdivdp, 2, float64, VsrD(i), -1022, 1023, 52)
2232 VSX_TDIV(xvtdivsp, 4, float32, VsrW(i), -126, 127, 23)
|
| /dports/emulators/qemu60/qemu-6.0.0/target/ppc/ |
| H A D | fpu_helper.c | 2187 #define VSX_TDIV(op, nels, tp, fld, emin, emax, nbits) \ macro
2230 VSX_TDIV(xstdivdp, 1, float64, VsrD(0), -1022, 1023, 52)
2231 VSX_TDIV(xvtdivdp, 2, float64, VsrD(i), -1022, 1023, 52)
2232 VSX_TDIV(xvtdivsp, 4, float32, VsrW(i), -126, 127, 23)
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/ppc/ |
| H A D | fpu_helper.c | 2186 #define VSX_TDIV(op, nels, tp, fld, emin, emax, nbits) \ macro
2230 VSX_TDIV(xstdivdp, 1, float64, VsrD(0), -1022, 1023, 52)
2231 VSX_TDIV(xvtdivdp, 2, float64, VsrD(i), -1022, 1023, 52)
2232 VSX_TDIV(xvtdivsp, 4, float32, VsrW(i), -126, 127, 23)
|