Searched refs:VXGE_CACHE_LINE_SIZE (Results 1 – 14 of 14) sorted by relevance
21 #ifndef VXGE_CACHE_LINE_SIZE22 #define VXGE_CACHE_LINE_SIZE 128 macro272 #define VXGE_HW_DEF_FIFO_ALIGNMENT_SIZE VXGE_CACHE_LINE_SIZE1912 VXGE_CACHE_LINE_SIZE); in vxge_os_dma_malloc()1921 size += VXGE_CACHE_LINE_SIZE; in vxge_os_dma_malloc()
2843 ((ring->rxd_priv_size + VXGE_CACHE_LINE_SIZE - 1) / in __vxge_hw_ring_create()2844 VXGE_CACHE_LINE_SIZE) * VXGE_CACHE_LINE_SIZE; in __vxge_hw_ring_create()3506 fifo->priv_size = ((fifo->priv_size + VXGE_CACHE_LINE_SIZE - 1) / in __vxge_hw_fifo_create()3507 VXGE_CACHE_LINE_SIZE) * VXGE_CACHE_LINE_SIZE; in __vxge_hw_fifo_create()
24 #ifndef VXGE_CACHE_LINE_SIZE25 #define VXGE_CACHE_LINE_SIZE 4096 macro