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/dports/emulators/libretro-vice/vice-libretro-5725415/vice/src/residfp/builders/residfp-builder/residfp/
H A DIntegrator.h220 int Vgs = kVg - vx; in solve() local
221 if (Vgs < 0) Vgs = 0; in solve()
222 assert(Vgs < (1 << 16)); in solve()
228 const unsigned int If = static_cast<unsigned int>(vcr_n_Ids_term[Vgs]) << 15; in solve()
/dports/emulators/mess/mame-mame0226/src/lib/netlist/analog/
H A Dnld_mosfet.cpp398 nl_fptype Vctrl = Vgs - Vth * m_polarity;
423 const nl_fptype Vds = Vgs - Vgd;
451 nl_fptype Vgs = -m_SG.deltaV() * m_polarity; // Gate - Source
456 nl_fptype d = (Vgs - m_Vgs);
461 m_Vgs = Vgs;
466 const nl_fptype Vds = Vgs - Vgd;
483 const nl_fptype Vctrl = (is_forward ? Vgs : Vgd) - Vth;
544 Ids - gm * Vgs - gmb * Vbs - gds * Vds
575 const nl_fptype Vgb = Vgs - Vbs;
578 calculate_caps(Vgs, Vgd, Vth, m_Cgs, m_Cgd, m_Cgb);
[all …]
/dports/emulators/mame/mame-mame0226/src/lib/netlist/analog/
H A Dnld_mosfet.cpp398 nl_fptype Vctrl = Vgs - Vth * m_polarity;
423 const nl_fptype Vds = Vgs - Vgd;
451 nl_fptype Vgs = -m_SG.deltaV() * m_polarity; // Gate - Source
456 nl_fptype d = (Vgs - m_Vgs);
461 m_Vgs = Vgs;
466 const nl_fptype Vds = Vgs - Vgd;
483 const nl_fptype Vctrl = (is_forward ? Vgs : Vgd) - Vth;
544 Ids - gm * Vgs - gmb * Vbs - gds * Vds
575 const nl_fptype Vgb = Vgs - Vbs;
578 calculate_caps(Vgs, Vgd, Vth, m_Cgs, m_Cgd, m_Cgb);
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/dports/audio/libsidplayfp/libsidplayfp-2.3.1/src/builders/residfp-builder/residfp/
H A DIntegrator6581.h249 const int Vgs = (vx < kVg) ? kVg - vx : 0; in solve() local
250 assert(Vgs < (1 << 16)); in solve()
255 const unsigned int If = static_cast<unsigned int>(vcr_n_Ids_term[Vgs]) << 15; in solve()
/dports/emulators/dosbox-staging/dosbox-staging-0.78.0/src/libs/residfp/
H A DIntegrator6581.h249 const int Vgs = (vx < kVg) ? kVg - vx : 0; in solve() local
250 assert(Vgs < (1 << 16)); in solve()
255 const unsigned int If = static_cast<unsigned int>(vcr_n_Ids_term[Vgs]) << 15; in solve()
/dports/audio/ocp/ocp-0.2.90/playsid/libsidplayfp-git/src/builders/residfp-builder/residfp/
H A DIntegrator.h243 const int Vgs = (vx < kVg) ? kVg - vx : 0;
244 assert(Vgs < (1 << 16));
249 const unsigned int If = static_cast<unsigned int>(vcr_n_Ids_term[Vgs]) << 15;
/dports/cad/ghdl/ghdl-1.0.0/testsuite/vests/vhdl-ams/ad-hoc/fromUC/regression_test/
H A Dtest145.ams129 stfct,leff,xd,qnfscox,fn,dcrit,deltal,It,Ids,R,Vds,Vgs,Vbs,
209 Vgs:=channel* Vgsq;
214 Vgs:=channel* Vgsq;
245 Vgstos:=Vgs-Vfb;
248 Vgst:=Vgs-vth;
279 if (Vgs<vth+delv) and (nfs>0.0) then
280 stfct:=exp((Vgs-vth-delv)/delv);
320 if Vgs<=vth then
/dports/cad/ghdl/ghdl-1.0.0/testsuite/vests/vhdl-ams/ad-hoc/fromUC/simultaneous_stmts/
H A Dtest145.ams129 stfct,leff,xd,qnfscox,fn,dcrit,deltal,It,Ids,R,Vds,Vgs,Vbs,
209 Vgs:=channel* Vgsq;
214 Vgs:=channel* Vgsq;
245 Vgstos:=Vgs-Vfb;
248 Vgst:=Vgs-vth;
279 if (Vgs<vth+delv) and (nfs>0.0) then
280 stfct:=exp((Vgs-vth-delv)/delv);
320 if Vgs<=vth then
/dports/cad/gnucap/gnucap-2013-04-23/apps/
H A Dd_mos5.model61 double vgg "Max Vgs"
154 double beta0 "Beta at Vds = 0 and Vgs = Vth"
158 double betas0 "Beta at Vds=Vdd and Vgs=Vth"
166 double beta2G "Vgs dependence of Beta2"
172 double beta3G "Vgs dependence of Beta3"
178 double beta4G "Vgs dependence of Beta4"
215 double Vgs = std::min(m->vgg2, d->vgs);
217 trace3("", Vbs, Vgs, Vds);
247 d->vgst = Vgs - d->von;
424 trace4("", Betas, s->betas0, s->betasB, Vgs);
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H A Dd_mos.model279 bool reversed "flag: Vgs < 0, reverse s & d" default=false;
503 double Vds, Vgs, Vbs;
506 Vgs = polarity * volts_limited(_n[n_g],_n[n_id]);
510 Vgs = polarity * volts_limited(_n[n_g],_n[n_is]);
513 vgs = fet_limit_vgs(Vgs, vgs, von);
515 vds = Vds + (vgs - Vgs);
522 // The hack maintains Vdg after Vgs limiting.
523 //Vds = Vds + (vgs - Vgs);
529 //vgs = Vgs;
/dports/cad/jspice3/jspice3-2.5/src/lib/dev/bsim2/
H A Db2eval.c22 B2evaluate(Vds,Vbs,Vgs,here,model,gm,gds,gmb,qg,qb,qd,cgg,cgd,cgs, in B2evaluate() argument
28 double Vds,Vbs,Vgs;
65 if (Vgs > model->B2vgg2) Vgs = model->B2vgg2;
94 Vgst = Vgs - Vth;
244 + here->pParam->B2beta2G * Vgs;
246 + here->pParam->B2beta3G * Vgs;
248 + here->pParam->B2beta4G * Vgs;
427 Arg1 = Vgs - Vbseff - here->pParam->B2vfb;
/dports/cad/ngspice_rework/ngspice-35/tests/hfet/
H A Did_vgs.out4 Circuit: HFET Id versus Vgs characteristic
7 HFET Id versus Vgs characteristic
H A Did_vgs.cir1 HFET Id versus Vgs characteristic
/dports/cad/ngspice_rework/ngspice-35/src/spicelib/devices/bsim2/
H A Db2eval.c18 B2evaluate(double Vds, double Vbs, double Vgs, B2instance *here, B2model *model, in B2evaluate() argument
58 if (Vgs > model->B2vgg2) Vgs = model->B2vgg2; in B2evaluate()
87 Vgst = Vgs - Vth; in B2evaluate()
237 + here->pParam->B2beta2G * Vgs; in B2evaluate()
239 + here->pParam->B2beta3G * Vgs; in B2evaluate()
241 + here->pParam->B2beta4G * Vgs; in B2evaluate()
417 Arg1 = Vgs - Vbseff - here->pParam->B2vfb; in B2evaluate()
/dports/cad/ngspice_rework/ngspice-35/tests/mes/
H A Dsubth.cir5 Vgs 3 0 dc 0
/dports/cad/ngspice_rework/ngspice-35/examples/various/
H A Dnmos_pmos_BSIM330.sp1 *****Single NMOS and PMOS Transistor For BSIM3 threshold voltage check (Id-Vgs) (Id-Vds) ***
H A Dnmos_pmos_plotting.sp1 *****Single NMOS and PMOS Transistor For BSIM3 threshold voltage check (Id-Vgs) (Id-Vds) ***
/dports/emulators/vice/vice-3.5/src/resid/
H A Dfilter.h1550 int Vgs = kVg - vx;
1551 if (Vgs < 0) Vgs = 0;
1556 int n_I_vcr = int(unsigned(vcr_n_Ids_term[Vgs] - vcr_n_Ids_term[Vgd]) << 15);
H A Dfilter8580new.h1716 int Vgs = kVg - vx;
1717 if (Vgs < 0) Vgs = 0;
1722 int n_I_vcr = int(unsigned(vcr_n_Ids_term[Vgs] - vcr_n_Ids_term[Vgd]) << 15);
/dports/audio/libsidplayfp/libsidplayfp-2.3.1/src/builders/resid-builder/resid/
H A Dfilter.h1550 int Vgs = kVg - vx;
1551 if (Vgs < 0) Vgs = 0;
1556 int n_I_vcr = int(unsigned(vcr_n_Ids_term[Vgs] - vcr_n_Ids_term[Vgd]) << 15);
H A Dfilter8580new.h1716 int Vgs = kVg - vx;
1717 if (Vgs < 0) Vgs = 0;
1722 int n_I_vcr = int(unsigned(vcr_n_Ids_term[Vgs] - vcr_n_Ids_term[Vgd]) << 15);
/dports/emulators/libretro-vice/vice-libretro-5725415/vice/src/resid/
H A Dfilter.h1550 int Vgs = kVg - vx;
1551 if (Vgs < 0) Vgs = 0;
1556 int n_I_vcr = int(unsigned(vcr_n_Ids_term[Vgs] - vcr_n_Ids_term[Vgd]) << 15);
/dports/audio/ocp/ocp-0.2.90/playsid/libsidplayfp-git/src/builders/resid-builder/resid/
H A Dfilter.h1550 int Vgs = kVg - vx;
1551 if (Vgs < 0) Vgs = 0;
1556 int n_I_vcr = int(unsigned(vcr_n_Ids_term[Vgs] - vcr_n_Ids_term[Vgd]) << 15);
/dports/cad/ngspice_rework/ngspice-35/src/spicelib/devices/hisim2/
H A Dhsm2eval.c1377 Vgs = Vgsc ; in HSM2evaluate()
1410 Vgsz = Vgs + Vzadd ; in HSM2evaluate()
1421 T2 = Vgs - Vfb ; in HSM2evaluate()
1878 Vgsz = Vgs + Vzadd ; in HSM2evaluate()
1887 T2 = Vgs - Vfb ; in HSM2evaluate()
2160 T0 = Vgs - Vfb ; in HSM2evaluate()
5297 Vgs = Vgs + dVgs ; in HSM2evaluate()
5647 T3 = Vgs * T0 ; in HSM2evaluate()
5664 T1 = Vgs - Vds ; in HSM2evaluate()
5925 covvg = Vgs ; in HSM2evaluate()
[all …]
/dports/cad/ngspice_rework/ngspice-35/src/spicelib/devices/hisimhv2/
H A Dhsmhv2eval.c1571 Vgsz = Vgs + Vzadd ; in HSMHV2evaluate()
1582 T2 = Vgs - Vfb ; in HSMHV2evaluate()
1671 T6 = T5 - Vgs + Vfb ; in HSMHV2evaluate()
2061 if ( Vgs < Vgs_fb ) { in HSMHV2evaluate()
4795 T0 = Vgs / Tox0 / Tox0 ; in HSMHV2evaluate()
4796 T3 = Vgs * T0 ; in HSMHV2evaluate()
4805 if ( Vgs >= 0.0e0 ){ in HSMHV2evaluate()
4814 T1 = Vgs - Vds ; in HSMHV2evaluate()
5175 Vgbgmt = Vgs - Vbs ; in HSMHV2evaluate()
5330 Vgbgmt = Vgs - Vbs ; in HSMHV2evaluate()
[all …]

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