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Searched refs:WREG32 (Results 1 – 25 of 526) sorted by relevance

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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/misc/habanalabs/goya/
H A Dgoya_security.c23 WREG32(pb_addr, 0); in goya_pb_set_block()
81 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
104 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
128 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
160 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
180 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
194 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
210 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
228 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
251 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
[all …]
H A Dgoya_coresight.c340 WREG32(base_reg + 0x20, 0); in goya_config_etf()
352 WREG32(base_reg + 0x20, 1); in goya_config_etf()
354 WREG32(base_reg + 0x34, 0); in goya_config_etf()
355 WREG32(base_reg + 0x28, 0); in goya_config_etf()
414 WREG32(mmPSOC_ETR_CTL, 0); in goya_config_etr()
446 WREG32(mmPSOC_ETR_DBALO, in goya_config_etr()
448 WREG32(mmPSOC_ETR_DBAHI, in goya_config_etr()
450 WREG32(mmPSOC_ETR_FFCR, 3); in goya_config_etr()
452 WREG32(mmPSOC_ETR_CTL, 1); in goya_config_etr()
458 WREG32(mmPSOC_ETR_PSCR, 0); in goya_config_etr()
[all …]
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/misc/habanalabs/goya/
H A Dgoya_security.c23 WREG32(pb_addr, 0); in goya_pb_set_block()
81 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
104 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
128 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
160 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
180 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
194 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
210 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
228 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
251 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
[all …]
H A Dgoya_coresight.c340 WREG32(base_reg + 0x20, 0); in goya_config_etf()
352 WREG32(base_reg + 0x20, 1); in goya_config_etf()
354 WREG32(base_reg + 0x34, 0); in goya_config_etf()
355 WREG32(base_reg + 0x28, 0); in goya_config_etf()
414 WREG32(mmPSOC_ETR_CTL, 0); in goya_config_etr()
446 WREG32(mmPSOC_ETR_DBALO, in goya_config_etr()
448 WREG32(mmPSOC_ETR_DBAHI, in goya_config_etr()
450 WREG32(mmPSOC_ETR_FFCR, 3); in goya_config_etr()
452 WREG32(mmPSOC_ETR_CTL, 1); in goya_config_etr()
458 WREG32(mmPSOC_ETR_PSCR, 0); in goya_config_etr()
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/misc/habanalabs/goya/
H A Dgoya_security.c23 WREG32(pb_addr, 0); in goya_pb_set_block()
81 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
104 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
128 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
160 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
180 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
194 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
210 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
228 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
251 WREG32(pb_addr + word_offset, ~mask); in goya_init_mme_protection_bits()
[all …]
H A Dgoya_coresight.c340 WREG32(base_reg + 0x20, 0); in goya_config_etf()
352 WREG32(base_reg + 0x20, 1); in goya_config_etf()
354 WREG32(base_reg + 0x34, 0); in goya_config_etf()
355 WREG32(base_reg + 0x28, 0); in goya_config_etf()
414 WREG32(mmPSOC_ETR_CTL, 0); in goya_config_etr()
446 WREG32(mmPSOC_ETR_DBALO, in goya_config_etr()
448 WREG32(mmPSOC_ETR_DBAHI, in goya_config_etr()
450 WREG32(mmPSOC_ETR_FFCR, 3); in goya_config_etr()
452 WREG32(mmPSOC_ETR_CTL, 1); in goya_config_etr()
458 WREG32(mmPSOC_ETR_PSCR, 0); in goya_config_etr()
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/radeon/
H A Drv515.c204 WREG32(MC_IND_INDEX, 0); in rv515_mc_rreg()
216 WREG32(MC_IND_DATA, (v)); in rv515_mc_wreg()
217 WREG32(MC_IND_INDEX, 0); in rv515_mc_wreg()
694 WREG32(index_reg, 0x0); in atom_rv515_force_tv_scaler()
696 WREG32(index_reg, 0x1); in atom_rv515_force_tv_scaler()
698 WREG32(index_reg, 0x2); in atom_rv515_force_tv_scaler()
700 WREG32(index_reg, 0x100); in atom_rv515_force_tv_scaler()
702 WREG32(index_reg, 0x101); in atom_rv515_force_tv_scaler()
704 WREG32(index_reg, 0x102); in atom_rv515_force_tv_scaler()
706 WREG32(index_reg, 0x200); in atom_rv515_force_tv_scaler()
[all …]
H A Dradeon_bios.c278 WREG32(AVIVO_D1VGA_CONTROL, in ni_read_disabled_bios()
281 WREG32(AVIVO_D2VGA_CONTROL, in ni_read_disabled_bios()
326 WREG32(AVIVO_D1VGA_CONTROL, in r700_read_disabled_bios()
329 WREG32(AVIVO_D2VGA_CONTROL, in r700_read_disabled_bios()
405 WREG32(AVIVO_D1VGA_CONTROL, in r600_read_disabled_bios()
408 WREG32(AVIVO_D2VGA_CONTROL, in r600_read_disabled_bios()
414 WREG32(R600_ROM_CNTL, in r600_read_disabled_bios()
471 WREG32(RADEON_SEPROM_CNTL1, in avivo_read_disabled_bios()
485 WREG32(AVIVO_D1VGA_CONTROL, in avivo_read_disabled_bios()
488 WREG32(AVIVO_D2VGA_CONTROL, in avivo_read_disabled_bios()
[all …]
H A Drv770.c914 WREG32(VM_L2_CNTL2, 0); in rv770_pcie_gart_enable()
960 WREG32(VM_L2_CNTL2, 0); in rv770_pcie_gart_disable()
991 WREG32(VM_L2_CNTL2, 0); in rv770_agp_enable()
1089 WREG32(SCRATCH_UMSK, 0); in r700_cp_stop()
1102 WREG32(CP_RB_CNTL, in rv770_cp_load_microcode()
1569 WREG32(VGT_GS_PER_VS, 2); in rv770_gpu_init()
1574 WREG32(VGT_STRMOUT_EN, 0); in rv770_gpu_init()
1575 WREG32(SX_MISC, 0); in rv770_gpu_init()
1581 WREG32(SPI_INPUT_Z, 0); in rv770_gpu_init()
1595 WREG32(TCP_CNTL, 0); in rv770_gpu_init()
[all …]
H A Dvce_v2_0.c46 WREG32(VCE_CLOCK_GATING_B, tmp); in vce_v2_0_set_sw_cg()
56 WREG32(VCE_CGTT_CLK_OVERRIDE, 0); in vce_v2_0_set_sw_cg()
61 WREG32(VCE_CLOCK_GATING_B, tmp); in vce_v2_0_set_sw_cg()
86 WREG32(VCE_CLOCK_GATING_B, tmp); in vce_v2_0_set_dyn_cg()
105 WREG32(VCE_CGTT_CLK_OVERRIDE, 7); in vce_v2_0_disable_cg()
139 WREG32(VCE_CLOCK_GATING_A, tmp); in vce_v2_0_init_cg()
149 WREG32(VCE_CLOCK_GATING_B, tmp); in vce_v2_0_init_cg()
166 WREG32(VCE_CLOCK_GATING_B, 0xf7); in vce_v2_0_resume()
170 WREG32(VCE_LMI_SWAP_CNTL, 0); in vce_v2_0_resume()
171 WREG32(VCE_LMI_SWAP_CNTL1, 0); in vce_v2_0_resume()
[all …]
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/radeon/
H A Drv515.c204 WREG32(MC_IND_INDEX, 0); in rv515_mc_rreg()
216 WREG32(MC_IND_DATA, (v)); in rv515_mc_wreg()
217 WREG32(MC_IND_INDEX, 0); in rv515_mc_wreg()
694 WREG32(index_reg, 0x0); in atom_rv515_force_tv_scaler()
696 WREG32(index_reg, 0x1); in atom_rv515_force_tv_scaler()
698 WREG32(index_reg, 0x2); in atom_rv515_force_tv_scaler()
700 WREG32(index_reg, 0x100); in atom_rv515_force_tv_scaler()
702 WREG32(index_reg, 0x101); in atom_rv515_force_tv_scaler()
704 WREG32(index_reg, 0x102); in atom_rv515_force_tv_scaler()
706 WREG32(index_reg, 0x200); in atom_rv515_force_tv_scaler()
[all …]
H A Dradeon_bios.c278 WREG32(AVIVO_D1VGA_CONTROL, in ni_read_disabled_bios()
281 WREG32(AVIVO_D2VGA_CONTROL, in ni_read_disabled_bios()
326 WREG32(AVIVO_D1VGA_CONTROL, in r700_read_disabled_bios()
329 WREG32(AVIVO_D2VGA_CONTROL, in r700_read_disabled_bios()
405 WREG32(AVIVO_D1VGA_CONTROL, in r600_read_disabled_bios()
408 WREG32(AVIVO_D2VGA_CONTROL, in r600_read_disabled_bios()
414 WREG32(R600_ROM_CNTL, in r600_read_disabled_bios()
471 WREG32(RADEON_SEPROM_CNTL1, in avivo_read_disabled_bios()
485 WREG32(AVIVO_D1VGA_CONTROL, in avivo_read_disabled_bios()
488 WREG32(AVIVO_D2VGA_CONTROL, in avivo_read_disabled_bios()
[all …]
H A Drv770.c914 WREG32(VM_L2_CNTL2, 0); in rv770_pcie_gart_enable()
960 WREG32(VM_L2_CNTL2, 0); in rv770_pcie_gart_disable()
991 WREG32(VM_L2_CNTL2, 0); in rv770_agp_enable()
1089 WREG32(SCRATCH_UMSK, 0); in r700_cp_stop()
1102 WREG32(CP_RB_CNTL, in rv770_cp_load_microcode()
1569 WREG32(VGT_GS_PER_VS, 2); in rv770_gpu_init()
1574 WREG32(VGT_STRMOUT_EN, 0); in rv770_gpu_init()
1575 WREG32(SX_MISC, 0); in rv770_gpu_init()
1581 WREG32(SPI_INPUT_Z, 0); in rv770_gpu_init()
1595 WREG32(TCP_CNTL, 0); in rv770_gpu_init()
[all …]
H A Dvce_v2_0.c46 WREG32(VCE_CLOCK_GATING_B, tmp); in vce_v2_0_set_sw_cg()
56 WREG32(VCE_CGTT_CLK_OVERRIDE, 0); in vce_v2_0_set_sw_cg()
61 WREG32(VCE_CLOCK_GATING_B, tmp); in vce_v2_0_set_sw_cg()
86 WREG32(VCE_CLOCK_GATING_B, tmp); in vce_v2_0_set_dyn_cg()
105 WREG32(VCE_CGTT_CLK_OVERRIDE, 7); in vce_v2_0_disable_cg()
139 WREG32(VCE_CLOCK_GATING_A, tmp); in vce_v2_0_init_cg()
149 WREG32(VCE_CLOCK_GATING_B, tmp); in vce_v2_0_init_cg()
166 WREG32(VCE_CLOCK_GATING_B, 0xf7); in vce_v2_0_resume()
170 WREG32(VCE_LMI_SWAP_CNTL, 0); in vce_v2_0_resume()
171 WREG32(VCE_LMI_SWAP_CNTL1, 0); in vce_v2_0_resume()
[all …]
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/radeon/
H A Drv515.c204 WREG32(MC_IND_INDEX, 0); in rv515_mc_rreg()
216 WREG32(MC_IND_DATA, (v)); in rv515_mc_wreg()
217 WREG32(MC_IND_INDEX, 0); in rv515_mc_wreg()
694 WREG32(index_reg, 0x0); in atom_rv515_force_tv_scaler()
696 WREG32(index_reg, 0x1); in atom_rv515_force_tv_scaler()
698 WREG32(index_reg, 0x2); in atom_rv515_force_tv_scaler()
700 WREG32(index_reg, 0x100); in atom_rv515_force_tv_scaler()
702 WREG32(index_reg, 0x101); in atom_rv515_force_tv_scaler()
704 WREG32(index_reg, 0x102); in atom_rv515_force_tv_scaler()
706 WREG32(index_reg, 0x200); in atom_rv515_force_tv_scaler()
[all …]
H A Dradeon_bios.c278 WREG32(AVIVO_D1VGA_CONTROL, in ni_read_disabled_bios()
281 WREG32(AVIVO_D2VGA_CONTROL, in ni_read_disabled_bios()
326 WREG32(AVIVO_D1VGA_CONTROL, in r700_read_disabled_bios()
329 WREG32(AVIVO_D2VGA_CONTROL, in r700_read_disabled_bios()
405 WREG32(AVIVO_D1VGA_CONTROL, in r600_read_disabled_bios()
408 WREG32(AVIVO_D2VGA_CONTROL, in r600_read_disabled_bios()
414 WREG32(R600_ROM_CNTL, in r600_read_disabled_bios()
471 WREG32(RADEON_SEPROM_CNTL1, in avivo_read_disabled_bios()
485 WREG32(AVIVO_D1VGA_CONTROL, in avivo_read_disabled_bios()
488 WREG32(AVIVO_D2VGA_CONTROL, in avivo_read_disabled_bios()
[all …]
H A Drv770.c914 WREG32(VM_L2_CNTL2, 0); in rv770_pcie_gart_enable()
960 WREG32(VM_L2_CNTL2, 0); in rv770_pcie_gart_disable()
991 WREG32(VM_L2_CNTL2, 0); in rv770_agp_enable()
1089 WREG32(SCRATCH_UMSK, 0); in r700_cp_stop()
1102 WREG32(CP_RB_CNTL, in rv770_cp_load_microcode()
1569 WREG32(VGT_GS_PER_VS, 2); in rv770_gpu_init()
1574 WREG32(VGT_STRMOUT_EN, 0); in rv770_gpu_init()
1575 WREG32(SX_MISC, 0); in rv770_gpu_init()
1581 WREG32(SPI_INPUT_Z, 0); in rv770_gpu_init()
1595 WREG32(TCP_CNTL, 0); in rv770_gpu_init()
[all …]
H A Dvce_v2_0.c46 WREG32(VCE_CLOCK_GATING_B, tmp); in vce_v2_0_set_sw_cg()
56 WREG32(VCE_CGTT_CLK_OVERRIDE, 0); in vce_v2_0_set_sw_cg()
61 WREG32(VCE_CLOCK_GATING_B, tmp); in vce_v2_0_set_sw_cg()
86 WREG32(VCE_CLOCK_GATING_B, tmp); in vce_v2_0_set_dyn_cg()
105 WREG32(VCE_CGTT_CLK_OVERRIDE, 7); in vce_v2_0_disable_cg()
139 WREG32(VCE_CLOCK_GATING_A, tmp); in vce_v2_0_init_cg()
149 WREG32(VCE_CLOCK_GATING_B, tmp); in vce_v2_0_init_cg()
166 WREG32(VCE_CLOCK_GATING_B, 0xf7); in vce_v2_0_resume()
170 WREG32(VCE_LMI_SWAP_CNTL, 0); in vce_v2_0_resume()
171 WREG32(VCE_LMI_SWAP_CNTL1, 0); in vce_v2_0_resume()
[all …]
/dports/misc/rump/buildrump.sh-b914579/src/sys/external/bsd/drm2/dist/drm/radeon/
H A Drv515.c218 WREG32(MC_IND_INDEX, 0); in rv515_mc_rreg()
230 WREG32(MC_IND_DATA, (v)); in rv515_mc_wreg()
231 WREG32(MC_IND_INDEX, 0); in rv515_mc_wreg()
721 WREG32(index_reg, 0x0); in atom_rv515_force_tv_scaler()
723 WREG32(index_reg, 0x1); in atom_rv515_force_tv_scaler()
725 WREG32(index_reg, 0x2); in atom_rv515_force_tv_scaler()
727 WREG32(index_reg, 0x100); in atom_rv515_force_tv_scaler()
729 WREG32(index_reg, 0x101); in atom_rv515_force_tv_scaler()
731 WREG32(index_reg, 0x102); in atom_rv515_force_tv_scaler()
733 WREG32(index_reg, 0x200); in atom_rv515_force_tv_scaler()
[all …]
H A Drv770.c902 WREG32(VM_L2_CNTL2, 0); in rv770_pcie_gart_enable()
948 WREG32(VM_L2_CNTL2, 0); in rv770_pcie_gart_disable()
979 WREG32(VM_L2_CNTL2, 0); in rv770_agp_enable()
1077 WREG32(SCRATCH_UMSK, 0); in r700_cp_stop()
1090 WREG32(CP_RB_CNTL, in rv770_cp_load_microcode()
1561 WREG32(VGT_GS_PER_VS, 2); in rv770_gpu_init()
1566 WREG32(VGT_STRMOUT_EN, 0); in rv770_gpu_init()
1567 WREG32(SX_MISC, 0); in rv770_gpu_init()
1573 WREG32(SPI_INPUT_Z, 0); in rv770_gpu_init()
1587 WREG32(TCP_CNTL, 0); in rv770_gpu_init()
[all …]
H A Dradeon_bios.c328 WREG32(AVIVO_D1VGA_CONTROL, in ni_read_disabled_bios()
331 WREG32(AVIVO_D2VGA_CONTROL, in ni_read_disabled_bios()
376 WREG32(AVIVO_D1VGA_CONTROL, in r700_read_disabled_bios()
379 WREG32(AVIVO_D2VGA_CONTROL, in r700_read_disabled_bios()
455 WREG32(AVIVO_D1VGA_CONTROL, in r600_read_disabled_bios()
458 WREG32(AVIVO_D2VGA_CONTROL, in r600_read_disabled_bios()
464 WREG32(R600_ROM_CNTL, in r600_read_disabled_bios()
521 WREG32(RADEON_SEPROM_CNTL1, in avivo_read_disabled_bios()
535 WREG32(AVIVO_D1VGA_CONTROL, in avivo_read_disabled_bios()
538 WREG32(AVIVO_D2VGA_CONTROL, in avivo_read_disabled_bios()
[all …]
H A Dvce_v2_0.c41 WREG32(VCE_CLOCK_GATING_B, tmp); in vce_v2_0_set_sw_cg()
51 WREG32(VCE_CGTT_CLK_OVERRIDE, 0); in vce_v2_0_set_sw_cg()
56 WREG32(VCE_CLOCK_GATING_B, tmp); in vce_v2_0_set_sw_cg()
81 WREG32(VCE_CLOCK_GATING_B, tmp); in vce_v2_0_set_dyn_cg()
100 WREG32(VCE_CGTT_CLK_OVERRIDE, 7); in vce_v2_0_disable_cg()
130 WREG32(VCE_CLOCK_GATING_A, tmp); in vce_v2_0_init_cg()
140 WREG32(VCE_CLOCK_GATING_B, tmp); in vce_v2_0_init_cg()
151 WREG32(VCE_CLOCK_GATING_B, 0xf7); in vce_v2_0_resume()
155 WREG32(VCE_LMI_SWAP_CNTL, 0); in vce_v2_0_resume()
156 WREG32(VCE_LMI_SWAP_CNTL1, 0); in vce_v2_0_resume()
[all …]
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/misc/habanalabs/gaudi/
H A Dgaudi_coresight.c506 WREG32(base_reg + 0x20, 0); in gaudi_config_etf()
518 WREG32(base_reg + 0x20, 1); in gaudi_config_etf()
520 WREG32(base_reg + 0x34, 0); in gaudi_config_etf()
521 WREG32(base_reg + 0x28, 0); in gaudi_config_etf()
602 WREG32(mmPSOC_ETR_CTL, 0); in gaudi_config_etr()
652 WREG32(mmPSOC_ETR_DBALO, in gaudi_config_etr()
654 WREG32(mmPSOC_ETR_DBAHI, in gaudi_config_etr()
656 WREG32(mmPSOC_ETR_FFCR, 3); in gaudi_config_etr()
658 WREG32(mmPSOC_ETR_CTL, 1); in gaudi_config_etr()
664 WREG32(mmPSOC_ETR_PSCR, 0); in gaudi_config_etr()
[all …]
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/misc/habanalabs/gaudi/
H A Dgaudi_coresight.c506 WREG32(base_reg + 0x20, 0); in gaudi_config_etf()
518 WREG32(base_reg + 0x20, 1); in gaudi_config_etf()
520 WREG32(base_reg + 0x34, 0); in gaudi_config_etf()
521 WREG32(base_reg + 0x28, 0); in gaudi_config_etf()
602 WREG32(mmPSOC_ETR_CTL, 0); in gaudi_config_etr()
652 WREG32(mmPSOC_ETR_DBALO, in gaudi_config_etr()
654 WREG32(mmPSOC_ETR_DBAHI, in gaudi_config_etr()
656 WREG32(mmPSOC_ETR_FFCR, 3); in gaudi_config_etr()
658 WREG32(mmPSOC_ETR_CTL, 1); in gaudi_config_etr()
664 WREG32(mmPSOC_ETR_PSCR, 0); in gaudi_config_etr()
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/misc/habanalabs/gaudi/
H A Dgaudi_coresight.c506 WREG32(base_reg + 0x20, 0); in gaudi_config_etf()
518 WREG32(base_reg + 0x20, 1); in gaudi_config_etf()
520 WREG32(base_reg + 0x34, 0); in gaudi_config_etf()
521 WREG32(base_reg + 0x28, 0); in gaudi_config_etf()
602 WREG32(mmPSOC_ETR_CTL, 0); in gaudi_config_etr()
652 WREG32(mmPSOC_ETR_DBALO, in gaudi_config_etr()
654 WREG32(mmPSOC_ETR_DBAHI, in gaudi_config_etr()
656 WREG32(mmPSOC_ETR_FFCR, 3); in gaudi_config_etr()
658 WREG32(mmPSOC_ETR_CTL, 1); in gaudi_config_etr()
664 WREG32(mmPSOC_ETR_PSCR, 0); in gaudi_config_etr()
[all …]

12345678910>>...22