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Searched refs:WRITE15 (Results 1 – 3 of 3) sorted by relevance

/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/control/
H A Dmdio_master.v113 WRITE15 = 81, constant
668 state <= WRITE15;
670 WRITE15: begin
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/simple_gemac/
H A Dmdio.v126 WRITE15 = 81, constant
743 state <= WRITE15;
745 WRITE15:begin
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/xge/rtl/verilog/
H A Dwishbone_if.v176 WRITE15 = 81, constant
920 state <= WRITE15;
922 WRITE15:begin