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Searched refs:XSTATE_BNDCSR_BIT (Results 1 – 22 of 22) sorted by relevance

/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/i386/
H A Dxsave_helper.c71 f = &x86_ext_save_areas[XSTATE_BNDCSR_BIT]; in x86_cpu_xsave_all_areas()
190 f = &x86_ext_save_areas[XSTATE_BNDCSR_BIT]; in x86_cpu_xrstor_all_areas()
H A Dcpu.h524 #define XSTATE_BNDCSR_BIT 4
534 #define XSTATE_BNDCSR_MASK (1ULL << XSTATE_BNDCSR_BIT)
H A Dcpu.c1325 [XSTATE_BNDCSR_BIT] =
/dports/emulators/qemu/qemu-6.2.0/target/i386/
H A Dxsave_helper.c71 f = &x86_ext_save_areas[XSTATE_BNDCSR_BIT]; in x86_cpu_xsave_all_areas()
190 f = &x86_ext_save_areas[XSTATE_BNDCSR_BIT]; in x86_cpu_xrstor_all_areas()
H A Dcpu.h535 #define XSTATE_BNDCSR_BIT 4 macro
545 #define XSTATE_BNDCSR_MASK (1ULL << XSTATE_BNDCSR_BIT)
H A Dcpu.c1389 [XSTATE_BNDCSR_BIT] =
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/i386/tcg/
H A Dtcg-cpu.c106 XO(XSTATE_BNDCSR_BIT, bndcsr_state); in tcg_cpu_xsave_init()
/dports/emulators/qemu/qemu-6.2.0/target/i386/tcg/
H A Dtcg-cpu.c107 XO(XSTATE_BNDCSR_BIT, bndcsr_state); in tcg_cpu_xsave_init()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/i386/
H A Dcpu.h467 #define XSTATE_BNDCSR_BIT 4 macro
477 #define XSTATE_BNDCSR_MASK (1ULL << XSTATE_BNDCSR_BIT)
H A Dcpu.c1146 [XSTATE_BNDCSR_BIT] =
/dports/emulators/qemu60/qemu-6.0.0/target/i386/
H A Dcpu.h490 #define XSTATE_BNDCSR_BIT 4 macro
500 #define XSTATE_BNDCSR_MASK (1ULL << XSTATE_BNDCSR_BIT)
H A Dcpu.c1479 [XSTATE_BNDCSR_BIT] =
/dports/emulators/qemu-utils/qemu-4.2.1/target/i386/
H A Dcpu.h486 #define XSTATE_BNDCSR_BIT 4 macro
496 #define XSTATE_BNDCSR_MASK (1ULL << XSTATE_BNDCSR_BIT)
H A Dcpu.c1531 [XSTATE_BNDCSR_BIT] =
/dports/emulators/qemu5/qemu-5.2.0/target/i386/
H A Dcpu.h491 #define XSTATE_BNDCSR_BIT 4 macro
501 #define XSTATE_BNDCSR_MASK (1ULL << XSTATE_BNDCSR_BIT)
H A Dcpu.c1451 [XSTATE_BNDCSR_BIT] =
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/i386/
H A Dcpu.h487 #define XSTATE_BNDCSR_BIT 4 macro
497 #define XSTATE_BNDCSR_MASK (1ULL << XSTATE_BNDCSR_BIT)
H A Dcpu.c1438 [XSTATE_BNDCSR_BIT] =
/dports/emulators/qemu42/qemu-4.2.1/target/i386/
H A Dcpu.h486 #define XSTATE_BNDCSR_BIT 4 macro
496 #define XSTATE_BNDCSR_MASK (1ULL << XSTATE_BNDCSR_BIT)
H A Dcpu.c1531 [XSTATE_BNDCSR_BIT] =
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/i386/
H A Dcpu.h487 #define XSTATE_BNDCSR_BIT 4 macro
497 #define XSTATE_BNDCSR_MASK (1ULL << XSTATE_BNDCSR_BIT)
H A Dcpu.c1531 [XSTATE_BNDCSR_BIT] =