| /dports/science/cdk/cdk-cdk-2.3/legacy/src/main/java/org/openscience/cdk/qsar/descriptors/molecular/ |
| H A D | IPMolecularLearningDescriptor.java | 73 private boolean addlp = true; field in IPMolecularLearningDescriptor
102 addlp = (Boolean) params[0]; in setParameters()
112 return new Object[]{addlp}; in getParameters()
129 if (addlp) { in calculate()
248 return addlp; in getParameterType()
|
| /dports/lang/v8/v8-9.6.180.12/src/execution/arm64/ |
| H A D | simulator-logic-arm64.cc | 1927 LogicVRegister Simulator::addlp(VectorFormat vform, LogicVRegister dst, in addlp() function in v8::internal::Simulator
1958 return addlp(vform, dst, src, true, false); in saddlp()
1963 return addlp(vform, dst, src, false, false); in uaddlp()
1968 return addlp(vform, dst, src, true, true); in sadalp()
1973 return addlp(vform, dst, src, false, true); in uadalp()
|
| H A D | simulator-arm64.h | 1728 LogicVRegister addlp(VectorFormat vform, LogicVRegister dst,
|
| /dports/www/firefox-esr/firefox-91.8.0/js/src/jit/arm64/vixl/ |
| H A D | Logic-vixl.cpp | 2015 LogicVRegister Simulator::addlp(VectorFormat vform, in addlp() function in vixl::Simulator
2058 return addlp(vform, dst, src, true, false); in saddlp()
2065 return addlp(vform, dst, src, false, false); in uaddlp()
2072 return addlp(vform, dst, src, true, true); in sadalp()
2079 return addlp(vform, dst, src, false, true); in uadalp()
|
| H A D | Simulator-vixl.h | 1539 LogicVRegister addlp(VectorFormat vform,
|
| /dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/v8/src/execution/arm64/ |
| H A D | simulator-logic-arm64.cc | 1927 LogicVRegister Simulator::addlp(VectorFormat vform, LogicVRegister dst, in addlp() function in v8::internal::Simulator
1958 return addlp(vform, dst, src, true, false); in saddlp()
1963 return addlp(vform, dst, src, false, false); in uaddlp()
1968 return addlp(vform, dst, src, true, true); in sadalp()
1973 return addlp(vform, dst, src, false, true); in uadalp()
|
| H A D | simulator-arm64.h | 1709 LogicVRegister addlp(VectorFormat vform, LogicVRegister dst,
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/v8/src/execution/arm64/ |
| H A D | simulator-logic-arm64.cc | 1927 LogicVRegister Simulator::addlp(VectorFormat vform, LogicVRegister dst, in addlp() function in v8::internal::Simulator
1958 return addlp(vform, dst, src, true, false); in saddlp()
1963 return addlp(vform, dst, src, false, false); in uaddlp()
1968 return addlp(vform, dst, src, true, true); in sadalp()
1973 return addlp(vform, dst, src, false, true); in uadalp()
|
| H A D | simulator-arm64.h | 1709 LogicVRegister addlp(VectorFormat vform, LogicVRegister dst,
|
| /dports/www/firefox/firefox-99.0/js/src/jit/arm64/vixl/ |
| H A D | Logic-vixl.cpp | 2015 LogicVRegister Simulator::addlp(VectorFormat vform, in addlp() function in vixl::Simulator
2058 return addlp(vform, dst, src, true, false); in saddlp()
2065 return addlp(vform, dst, src, false, false); in uaddlp()
2072 return addlp(vform, dst, src, true, true); in sadalp()
2079 return addlp(vform, dst, src, false, true); in uadalp()
|
| H A D | Simulator-vixl.h | 1539 LogicVRegister addlp(VectorFormat vform,
|
| /dports/www/node10/node-v10.24.1/deps/v8/src/arm64/ |
| H A D | simulator-logic-arm64.cc | 1928 LogicVRegister Simulator::addlp(VectorFormat vform, LogicVRegister dst, in addlp() function in v8::internal::Simulator
1959 return addlp(vform, dst, src, true, false); in saddlp()
1964 return addlp(vform, dst, src, false, false); in uaddlp()
1969 return addlp(vform, dst, src, true, true); in sadalp()
1974 return addlp(vform, dst, src, false, true); in uadalp()
|
| H A D | simulator-arm64.h | 1565 LogicVRegister addlp(VectorFormat vform, LogicVRegister dst,
|
| /dports/www/firefox-legacy/firefox-52.8.0esr/js/src/jit/arm64/vixl/ |
| H A D | Logic-vixl.cpp | 2265 LogicVRegister Simulator::addlp(VectorFormat vform, in addlp() function in vixl::Simulator
2308 return addlp(vform, dst, src, true, false); in saddlp()
2315 return addlp(vform, dst, src, false, false); in uaddlp()
2322 return addlp(vform, dst, src, true, true); in sadalp()
2329 return addlp(vform, dst, src, false, true); in uadalp()
|
| H A D | Simulator-vixl.h | 1714 LogicVRegister addlp(VectorFormat vform,
|
| /dports/lang/spidermonkey60/firefox-60.9.0/js/src/jit/arm64/vixl/ |
| H A D | Logic-vixl.cpp | 2265 LogicVRegister Simulator::addlp(VectorFormat vform, in addlp() function in vixl::Simulator
2308 return addlp(vform, dst, src, true, false); in saddlp()
2315 return addlp(vform, dst, src, false, false); in uaddlp()
2322 return addlp(vform, dst, src, true, true); in sadalp()
2329 return addlp(vform, dst, src, false, true); in uadalp()
|
| H A D | Simulator-vixl.h | 1713 LogicVRegister addlp(VectorFormat vform,
|
| /dports/mail/thunderbird/thunderbird-91.8.0/js/src/jit/arm64/vixl/ |
| H A D | Logic-vixl.cpp | 2015 LogicVRegister Simulator::addlp(VectorFormat vform, in addlp() function in vixl::Simulator
2058 return addlp(vform, dst, src, true, false); in saddlp()
2065 return addlp(vform, dst, src, false, false); in uaddlp()
2072 return addlp(vform, dst, src, true, true); in sadalp()
2079 return addlp(vform, dst, src, false, true); in uadalp()
|
| H A D | Simulator-vixl.h | 1539 LogicVRegister addlp(VectorFormat vform,
|
| /dports/lang/spidermonkey78/firefox-78.9.0/js/src/jit/arm64/vixl/ |
| H A D | Logic-vixl.cpp | 1971 LogicVRegister Simulator::addlp(VectorFormat vform, in addlp() function in vixl::Simulator
2014 return addlp(vform, dst, src, true, false); in saddlp()
2021 return addlp(vform, dst, src, false, false); in uaddlp()
2028 return addlp(vform, dst, src, true, true); in sadalp()
2035 return addlp(vform, dst, src, false, true); in uadalp()
|
| H A D | Simulator-vixl.h | 1541 LogicVRegister addlp(VectorFormat vform,
|
| /dports/databases/mongodb36/mongodb-src-r3.6.23/src/third_party/mozjs-45/extract/js/src/jit/arm64/vixl/ |
| H A D | Logic-vixl.cpp | 2263 LogicVRegister Simulator::addlp(VectorFormat vform, in addlp() function in vixl::Simulator
2306 return addlp(vform, dst, src, true, false); in saddlp()
2313 return addlp(vform, dst, src, false, false); in uaddlp()
2320 return addlp(vform, dst, src, true, true); in sadalp()
2327 return addlp(vform, dst, src, false, true); in uadalp()
|
| H A D | Simulator-vixl.h | 1825 LogicVRegister addlp(VectorFormat vform,
|
| /dports/lang/gcc12-devel/gcc-12-20211205/gcc/config/aarch64/ |
| H A D | aarch64-simd-builtins.def | 189 /* Implemented by aarch64_<su>addlp<mode>. */
|
| H A D | aarch64-simd.md | 3538 (define_insn "aarch64_<su>addlp<mode>"
3543 "<su>addlp\\t%0.<Vwhalf>, %1.<Vtype>"
|