/dports/emulators/qemu42/qemu-4.2.1/roms/skiboot/hw/ |
H A D | npu2-common.c | 342 uint32_t idx = isn - p->base_lsi; in npu2_ipi_attributes() 358 uint32_t idx = isn - p->base_lsi; in npu2_ipi_name() 405 uint32_t idx = isn - p->base_lsi; in npu2_err_interrupt() 442 p->base_lsi = xive_alloc_ipi_irqs(p->chip_id, NPU2_N_DL_IRQS, NPU2_N_DL_IRQS_ALIGN); in setup_irqs() 443 if (p->base_lsi == XIVE_IRQ_ERROR) { in setup_irqs() 447 xive_register_ipi_source(p->base_lsi, NPU2_N_DL_IRQS, p, &npu2_ipi_ops); in setup_irqs() 458 tp = xive_get_trigger_port(p->base_lsi); in setup_irqs()
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H A D | npu.c | 617 uint32_t idx = isn - p->base_lsi; in npu_lsi_attributes() 634 register_irq_source(&npu_lsi_irq_ops, p, p->base_lsi, 8); in npu_register_irq() 1551 uint32_t base_lsi = p->base_lsi; in npu_add_phb_properties() local 1554 0x0000, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL0, 1, in npu_add_phb_properties() 1556 0x0000, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL1, 1, in npu_add_phb_properties() 1558 0x0800, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL2, 1, in npu_add_phb_properties() 1560 0x0800, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL3, 1, in npu_add_phb_properties() 1649 p->base_lsi = p8_chip_irq_block_base(p->chip_id, P8_IRQ_BLOCK_MISC) + in npu_create_phb()
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/dports/emulators/qemu5/qemu-5.2.0/roms/skiboot/hw/ |
H A D | npu2-common.c | 342 uint32_t idx = isn - p->base_lsi; in npu2_ipi_attributes() 358 uint32_t idx = isn - p->base_lsi; in npu2_ipi_name() 405 uint32_t idx = isn - p->base_lsi; in npu2_err_interrupt() 442 p->base_lsi = xive_alloc_ipi_irqs(p->chip_id, NPU2_N_DL_IRQS, NPU2_N_DL_IRQS_ALIGN); in setup_irqs() 443 if (p->base_lsi == XIVE_IRQ_ERROR) { in setup_irqs() 447 xive_register_ipi_source(p->base_lsi, NPU2_N_DL_IRQS, p, &npu2_ipi_ops); in setup_irqs() 458 tp = xive_get_trigger_port(p->base_lsi); in setup_irqs()
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H A D | npu.c | 617 uint32_t idx = isn - p->base_lsi; in npu_lsi_attributes() 634 register_irq_source(&npu_lsi_irq_ops, p, p->base_lsi, 8); in npu_register_irq() 1551 uint32_t base_lsi = p->base_lsi; in npu_add_phb_properties() local 1554 0x0000, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL0, 1, in npu_add_phb_properties() 1556 0x0000, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL1, 1, in npu_add_phb_properties() 1558 0x0800, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL2, 1, in npu_add_phb_properties() 1560 0x0800, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL3, 1, in npu_add_phb_properties() 1649 p->base_lsi = p8_chip_irq_block_base(p->chip_id, P8_IRQ_BLOCK_MISC) + in npu_create_phb()
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/skiboot/hw/ |
H A D | npu2-common.c | 342 uint32_t idx = isn - p->base_lsi; in npu2_ipi_attributes() 358 uint32_t idx = isn - p->base_lsi; in npu2_ipi_name() 405 uint32_t idx = isn - p->base_lsi; in npu2_err_interrupt() 442 p->base_lsi = xive_alloc_ipi_irqs(p->chip_id, NPU2_N_DL_IRQS, NPU2_N_DL_IRQS_ALIGN); in setup_irqs() 443 if (p->base_lsi == XIVE_IRQ_ERROR) { in setup_irqs() 447 xive_register_ipi_source(p->base_lsi, NPU2_N_DL_IRQS, p, &npu2_ipi_ops); in setup_irqs() 458 tp = xive_get_trigger_port(p->base_lsi); in setup_irqs()
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H A D | npu.c | 617 uint32_t idx = isn - p->base_lsi; in npu_lsi_attributes() 634 register_irq_source(&npu_lsi_irq_ops, p, p->base_lsi, 8); in npu_register_irq() 1551 uint32_t base_lsi = p->base_lsi; in npu_add_phb_properties() local 1554 0x0000, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL0, 1, in npu_add_phb_properties() 1556 0x0000, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL1, 1, in npu_add_phb_properties() 1558 0x0800, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL2, 1, in npu_add_phb_properties() 1560 0x0800, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL3, 1, in npu_add_phb_properties() 1649 p->base_lsi = p8_chip_irq_block_base(p->chip_id, P8_IRQ_BLOCK_MISC) + in npu_create_phb()
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/skiboot/hw/ |
H A D | npu2-common.c | 342 uint32_t idx = isn - p->base_lsi; 358 uint32_t idx = isn - p->base_lsi; 405 uint32_t idx = isn - p->base_lsi; 442 p->base_lsi = xive_alloc_ipi_irqs(p->chip_id, NPU2_N_DL_IRQS, NPU2_N_DL_IRQS_ALIGN); 443 if (p->base_lsi == XIVE_IRQ_ERROR) { 447 xive_register_ipi_source(p->base_lsi, NPU2_N_DL_IRQS, p, &npu2_ipi_ops); 458 tp = xive_get_trigger_port(p->base_lsi);
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H A D | npu.c | 617 uint32_t idx = isn - p->base_lsi; 634 register_irq_source(&npu_lsi_irq_ops, p, p->base_lsi, 8); 1551 uint32_t base_lsi = p->base_lsi; 1554 0x0000, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL0, 1, 1556 0x0000, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL1, 1, 1558 0x0800, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL2, 1, 1560 0x0800, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL3, 1, 1649 p->base_lsi = p8_chip_irq_block_base(p->chip_id, P8_IRQ_BLOCK_MISC) +
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/dports/emulators/qemu/qemu-6.2.0/roms/skiboot/hw/ |
H A D | npu2-common.c | 329 uint32_t idx = isn - p->base_lsi; in npu2_ipi_attributes() 345 uint32_t idx = isn - p->base_lsi; in npu2_ipi_name() 392 uint32_t idx = isn - p->base_lsi; in npu2_err_interrupt() 436 p->base_lsi = xive_alloc_ipi_irqs(p->chip_id, NPU2_N_DL_IRQS, NPU2_N_DL_IRQS_ALIGN); in setup_irqs() 437 if (p->base_lsi == XIVE_IRQ_ERROR) { in setup_irqs() 441 xive_register_ipi_source(p->base_lsi, NPU2_N_DL_IRQS, p, &npu2_ipi_ops); in setup_irqs() 452 tp = xive_get_trigger_port(p->base_lsi); in setup_irqs()
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H A D | npu.c | 612 uint32_t idx = isn - p->base_lsi; in npu_lsi_attributes() 629 register_irq_source(&npu_lsi_irq_ops, p, p->base_lsi, 8); in npu_register_irq() 1545 uint32_t base_lsi = p->base_lsi; in npu_add_phb_properties() local 1548 0x0000, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL0, 1, in npu_add_phb_properties() 1550 0x0000, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL1, 1, in npu_add_phb_properties() 1552 0x0800, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL2, 1, in npu_add_phb_properties() 1554 0x0800, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL3, 1, in npu_add_phb_properties() 1643 p->base_lsi = p8_chip_irq_block_base(p->chip_id, P8_IRQ_BLOCK_MISC) + in npu_create_phb()
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/dports/emulators/qemu60/qemu-6.0.0/roms/skiboot/hw/ |
H A D | npu2-common.c | 342 uint32_t idx = isn - p->base_lsi; in npu2_ipi_attributes() 358 uint32_t idx = isn - p->base_lsi; in npu2_ipi_name() 405 uint32_t idx = isn - p->base_lsi; in npu2_err_interrupt() 442 p->base_lsi = xive_alloc_ipi_irqs(p->chip_id, NPU2_N_DL_IRQS, NPU2_N_DL_IRQS_ALIGN); in setup_irqs() 443 if (p->base_lsi == XIVE_IRQ_ERROR) { in setup_irqs() 447 xive_register_ipi_source(p->base_lsi, NPU2_N_DL_IRQS, p, &npu2_ipi_ops); in setup_irqs() 458 tp = xive_get_trigger_port(p->base_lsi); in setup_irqs()
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H A D | npu.c | 617 uint32_t idx = isn - p->base_lsi; in npu_lsi_attributes() 634 register_irq_source(&npu_lsi_irq_ops, p, p->base_lsi, 8); in npu_register_irq() 1551 uint32_t base_lsi = p->base_lsi; in npu_add_phb_properties() local 1554 0x0000, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL0, 1, in npu_add_phb_properties() 1556 0x0000, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL1, 1, in npu_add_phb_properties() 1558 0x0800, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL2, 1, in npu_add_phb_properties() 1560 0x0800, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL3, 1, in npu_add_phb_properties() 1649 p->base_lsi = p8_chip_irq_block_base(p->chip_id, P8_IRQ_BLOCK_MISC) + in npu_create_phb()
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/skiboot/hw/ |
H A D | npu.c | 617 uint32_t idx = isn - p->base_lsi; in npu_lsi_attributes() 634 register_irq_source(&npu_lsi_irq_ops, p, p->base_lsi, 8); in npu_register_irq() 1553 uint32_t base_lsi = p->base_lsi; in npu_add_phb_properties() local 1556 0x0000, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL0, 1, in npu_add_phb_properties() 1558 0x0000, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL1, 1, in npu_add_phb_properties() 1560 0x0800, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL2, 1, in npu_add_phb_properties() 1562 0x0800, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL3, 1, in npu_add_phb_properties() 1651 p->base_lsi = p8_chip_irq_block_base(p->chip_id, P8_IRQ_BLOCK_MISC) + in npu_create_phb()
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/dports/emulators/qemu42/qemu-4.2.1/roms/skiboot/include/ |
H A D | npu.h | 132 uint32_t base_lsi; member
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H A D | phb4.h | 192 uint32_t base_lsi; member
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/dports/emulators/qemu5/qemu-5.2.0/roms/skiboot/include/ |
H A D | npu.h | 132 uint32_t base_lsi; member
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H A D | phb4.h | 192 uint32_t base_lsi; member
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/skiboot/include/ |
H A D | npu.h | 132 uint32_t base_lsi; member
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H A D | npu2.h | 128 uint32_t base_lsi; member
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H A D | phb4.h | 249 uint32_t base_lsi; member
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/skiboot/include/ |
H A D | npu.h | 132 uint32_t base_lsi; member
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H A D | phb4.h | 192 uint32_t base_lsi; member
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/skiboot/include/ |
H A D | npu.h | 132 uint32_t base_lsi; member
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/dports/emulators/qemu/qemu-6.2.0/roms/skiboot/include/ |
H A D | npu.h | 119 uint32_t base_lsi; member
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/dports/emulators/qemu60/qemu-6.0.0/roms/skiboot/include/ |
H A D | npu.h | 132 uint32_t base_lsi; member
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