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Searched refs:c_ldsp (Results 1 – 25 of 28) sorted by relevance

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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/riscv/
H A Dinsn16.decode65 @c_ldsp ... . ..... ..... .. &i imm=%uimm_6bit_ld rs1=2 %rd
135 fld 001 . ..... ..... 10 @c_ldsp
156 ld 011 . ..... ..... 10 @c_ldsp
/dports/emulators/qemu/qemu-6.2.0/target/riscv/
H A Dinsn16.decode65 @c_ldsp ... . ..... ..... .. &i imm=%uimm_6bit_ld rs1=2 %rd
135 fld 001 . ..... ..... 10 @c_ldsp
156 ld 011 . ..... ..... 10 @c_ldsp
/dports/emulators/qemu-utils/qemu-4.2.1/target/riscv/
H A Dinsn16.decode65 @c_ldsp ... . ..... ..... .. &i imm=%uimm_6bit_ld rs1=2 %rd
116 fld 001 . ..... ..... 10 @c_ldsp
H A Dinsn16-64.decode34 ld 011 . ..... ..... 10 @c_ldsp
/dports/emulators/qemu5/qemu-5.2.0/target/riscv/
H A Dinsn16.decode65 @c_ldsp ... . ..... ..... .. &i imm=%uimm_6bit_ld rs1=2 %rd
116 fld 001 . ..... ..... 10 @c_ldsp
H A Dinsn16-64.decode34 ld 011 . ..... ..... 10 @c_ldsp
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/riscv/
H A Dinsn16.decode65 @c_ldsp ... . ..... ..... .. &i imm=%uimm_6bit_ld rs1=2 %rd
116 fld 001 . ..... ..... 10 @c_ldsp
H A Dinsn16-64.decode34 ld 011 . ..... ..... 10 @c_ldsp
/dports/emulators/qemu42/qemu-4.2.1/target/riscv/
H A Dinsn16.decode65 @c_ldsp ... . ..... ..... .. &i imm=%uimm_6bit_ld rs1=2 %rd
116 fld 001 . ..... ..... 10 @c_ldsp
H A Dinsn16-64.decode34 ld 011 . ..... ..... 10 @c_ldsp
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/riscv/
H A Dinsn16.decode65 @c_ldsp ... . ..... ..... .. &i imm=%uimm_6bit_ld rs1=2 %rd
116 fld 001 . ..... ..... 10 @c_ldsp
H A Dinsn16-64.decode34 ld 011 . ..... ..... 10 @c_ldsp
/dports/emulators/qemu60/qemu-6.0.0/target/riscv/
H A Dinsn16.decode65 @c_ldsp ... . ..... ..... .. &i imm=%uimm_6bit_ld rs1=2 %rd
116 fld 001 . ..... ..... 10 @c_ldsp
H A Dinsn16-64.decode34 ld 011 . ..... ..... 10 @c_ldsp
/dports/lang/v8/v8-9.6.180.12/test/cctest/
H A Dtest-disasm-riscv64.cc481 COMPARE(c_ldsp(s6, 344), "00006b76 ld s6, 344(sp)"); in TEST()
H A Dtest-assembler-riscv64.cc1391 __ c_ldsp(a0, 160); in TEST() local
/dports/devel/radare2/radare2-5.1.1/libr/asm/arch/riscv/
H A Driscv-opc.h1029 DECLARE_INSN(c_ldsp, MATCH_C_LDSP, MASK_C_LDSP)
/dports/lang/sdcc/sdcc-4.0.0/support/sdbinutils/include/opcode/
H A Driscv-opc.h1083 DECLARE_INSN(c_ldsp, MATCH_C_LDSP, MASK_C_LDSP)
/dports/devel/binutils/binutils-2.37/include/opcode/
H A Driscv-opc.h1163 DECLARE_INSN(c_ldsp, MATCH_C_LDSP, MASK_C_LDSP)
/dports/devel/arm-elf-binutils/binutils-2.37/include/opcode/
H A Driscv-opc.h1163 DECLARE_INSN(c_ldsp, MATCH_C_LDSP, MASK_C_LDSP)
/dports/devel/gnulibiberty/binutils-2.37/include/opcode/
H A Driscv-opc.h1163 DECLARE_INSN(c_ldsp, MATCH_C_LDSP, MASK_C_LDSP)
/dports/devel/gdb/gdb-11.1/include/opcode/
H A Driscv-opc.h1163 DECLARE_INSN(c_ldsp, MATCH_C_LDSP, MASK_C_LDSP)
/dports/emulators/riscv-isa-sim/riscv-isa-sim-4f12984/disasm/
H A Ddisasm.cc1740 DISASM_INSN("c.ldsp", c_ldsp, 0, {&xrd, &rvc_ldsp_address}); in disassembler_t()
/dports/lang/v8/v8-9.6.180.12/src/codegen/riscv64/
H A Dassembler-riscv64.h634 void c_ldsp(Register rd, uint16_t uimm9);
/dports/devel/openocd/openocd-0.11.0/src/target/riscv/
H A Dencoding.h2339 DECLARE_INSN(c_ldsp, MATCH_C_LDSP, MASK_C_LDSP)

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