| /dports/emulators/qemu-utils/qemu-4.2.1/target/riscv/ |
| H A D | insn16.decode | 70 @c_lui ... . ..... ..... .. &u imm=%imm_lui %rd
101 lui 011 . ..... ..... 01 @c_lui
|
| /dports/emulators/qemu5/qemu-5.2.0/target/riscv/ |
| H A D | insn16.decode | 70 @c_lui ... . ..... ..... .. &u imm=%imm_lui %rd
101 lui 011 . ..... ..... 01 @c_lui
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/target/riscv/ |
| H A D | insn16.decode | 70 @c_lui ... . ..... ..... .. &u imm=%imm_lui %rd
101 lui 011 . ..... ..... 01 @c_lui
|
| /dports/emulators/qemu42/qemu-4.2.1/target/riscv/ |
| H A D | insn16.decode | 70 @c_lui ... . ..... ..... .. &u imm=%imm_lui %rd
101 lui 011 . ..... ..... 01 @c_lui
|
| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/riscv/ |
| H A D | insn16.decode | 70 @c_lui ... . ..... ..... .. &u imm=%imm_lui %rd
101 lui 011 . ..... ..... 01 @c_lui
|
| /dports/emulators/qemu60/qemu-6.0.0/target/riscv/ |
| H A D | insn16.decode | 70 @c_lui ... . ..... ..... .. &u imm=%imm_lui %rd
101 lui 011 . ..... ..... 01 @c_lui
|
| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/riscv/ |
| H A D | insn16.decode | 70 @c_lui ... . ..... ..... .. &u imm=%imm_lui %rd
111 lui 011 . ..... ..... 01 @c_lui
|
| /dports/emulators/qemu/qemu-6.2.0/target/riscv/ |
| H A D | insn16.decode | 70 @c_lui ... . ..... ..... .. &u imm=%imm_lui %rd
111 lui 011 . ..... ..... 01 @c_lui
|
| /dports/lang/v8/v8-9.6.180.12/test/cctest/ |
| H A D | test-disasm-riscv64.cc | 477 COMPARE(c_lui(s1, 0xf4), "000074d1 lui s1, 0xffff4"); in TEST()
|
| H A D | test-assembler-riscv64.cc | 1253 auto fn = [](MacroAssembler& assm) { __ c_lui(a0, -20); }; in TEST() local
|
| /dports/emulators/riscv-isa-sim/riscv-isa-sim-4f12984/riscv/ |
| H A D | riscv.mk.in | 169 c_lui \
|
| H A D | encoding.h | 3515 DECLARE_INSN(c_lui, MATCH_C_LUI, MASK_C_LUI)
|
| /dports/devel/radare2/radare2-5.1.1/libr/asm/arch/riscv/ |
| H A D | riscv-opc.h | 999 DECLARE_INSN(c_lui, MATCH_C_LUI, MASK_C_LUI)
|
| /dports/lang/sdcc/sdcc-4.0.0/support/sdbinutils/include/opcode/ |
| H A D | riscv-opc.h | 1053 DECLARE_INSN(c_lui, MATCH_C_LUI, MASK_C_LUI)
|
| /dports/devel/binutils/binutils-2.37/include/opcode/ |
| H A D | riscv-opc.h | 1133 DECLARE_INSN(c_lui, MATCH_C_LUI, MASK_C_LUI)
|
| /dports/devel/arm-elf-binutils/binutils-2.37/include/opcode/ |
| H A D | riscv-opc.h | 1133 DECLARE_INSN(c_lui, MATCH_C_LUI, MASK_C_LUI)
|
| /dports/devel/gnulibiberty/binutils-2.37/include/opcode/ |
| H A D | riscv-opc.h | 1133 DECLARE_INSN(c_lui, MATCH_C_LUI, MASK_C_LUI)
|
| /dports/devel/gdb/gdb-11.1/include/opcode/ |
| H A D | riscv-opc.h | 1133 DECLARE_INSN(c_lui, MATCH_C_LUI, MASK_C_LUI)
|
| /dports/emulators/riscv-isa-sim/riscv-isa-sim-4f12984/disasm/ |
| H A D | disasm.cc | 1050 DISASM_INSN("c.lui", c_lui, 0, {&xrd, &rvc_uimm}); in disassembler_t()
|
| /dports/lang/v8/v8-9.6.180.12/src/codegen/riscv64/ |
| H A D | assembler-riscv64.h | 630 void c_lui(Register rd, int8_t imm6);
|
| H A D | assembler-riscv64.cc | 2232 void Assembler::c_lui(Register rd, int8_t imm6) { in c_lui() function in v8::internal::Assembler
|
| /dports/devel/openocd/openocd-0.11.0/src/target/riscv/ |
| H A D | encoding.h | 2311 DECLARE_INSN(c_lui, MATCH_C_LUI, MASK_C_LUI)
|