Searched refs:c_subw (Results 1 – 15 of 15) sorted by relevance
| /dports/lang/v8/v8-9.6.180.12/test/cctest/ |
| H A D | test-disasm-riscv64.cc | 492 COMPARE(c_subw(s1, a0), "00009c89 subw s1, s1, a0"); in TEST()
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| H A D | test-assembler-riscv64.cc | 1348 __ c_subw(a0, a1); in TEST() local
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| /dports/emulators/riscv-isa-sim/riscv-isa-sim-4f12984/riscv/ |
| H A D | riscv.mk.in | 178 c_subw \
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| H A D | encoding.h | 3540 DECLARE_INSN(c_subw, MATCH_C_SUBW, MASK_C_SUBW)
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| /dports/devel/radare2/radare2-5.1.1/libr/asm/arch/riscv/ |
| H A D | riscv-opc.h | 1007 DECLARE_INSN(c_subw, MATCH_C_SUBW, MASK_C_SUBW)
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| /dports/lang/sdcc/sdcc-4.0.0/support/sdbinutils/include/opcode/ |
| H A D | riscv-opc.h | 1061 DECLARE_INSN(c_subw, MATCH_C_SUBW, MASK_C_SUBW)
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| /dports/devel/binutils/binutils-2.37/include/opcode/ |
| H A D | riscv-opc.h | 1141 DECLARE_INSN(c_subw, MATCH_C_SUBW, MASK_C_SUBW)
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| /dports/devel/arm-elf-binutils/binutils-2.37/include/opcode/ |
| H A D | riscv-opc.h | 1141 DECLARE_INSN(c_subw, MATCH_C_SUBW, MASK_C_SUBW)
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| /dports/devel/gnulibiberty/binutils-2.37/include/opcode/ |
| H A D | riscv-opc.h | 1141 DECLARE_INSN(c_subw, MATCH_C_SUBW, MASK_C_SUBW)
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| /dports/devel/gdb/gdb-11.1/include/opcode/ |
| H A D | riscv-opc.h | 1141 DECLARE_INSN(c_subw, MATCH_C_SUBW, MASK_C_SUBW)
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| /dports/emulators/riscv-isa-sim/riscv-isa-sim-4f12984/disasm/ |
| H A D | disasm.cc | 1060 DISASM_INSN("c.subw", c_subw, 0, {&rvc_rs1s, &rvc_rs2s}); in disassembler_t()
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| /dports/lang/v8/v8-9.6.180.12/src/codegen/riscv64/ |
| H A D | assembler-riscv64.h | 646 void c_subw(Register rd, Register rs2);
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| H A D | assembler-riscv64.cc | 2309 void Assembler::c_subw(Register rd, Register rs2) { in c_subw() function in v8::internal::Assembler
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| H A D | macro-assembler-riscv64.cc | 453 c_subw(rd, rt.rm()); in Sub32()
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| /dports/devel/openocd/openocd-0.11.0/src/target/riscv/ |
| H A D | encoding.h | 2336 DECLARE_INSN(c_subw, MATCH_C_SUBW, MASK_C_SUBW)
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