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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/Transforms/PhaseOrdering/
H A Dbitfield-bittests.ll32 %bf.cast3 = zext i8 %bf.clear2 to i32
33 %or = or i32 %bf.cast, %bf.cast3
60 %bf.cast3 = zext i8 %bf.clear2 to i32
61 %or = or i32 %bf.cast, %bf.cast3
88 %bf.cast3 = zext i8 %bf.clear2 to i32
89 %and = and i32 %bf.cast, %bf.cast3
116 %bf.cast3 = zext i8 %bf.clear2 to i32
117 %and = and i32 %bf.cast, %bf.cast3
/dports/devel/llvm11/llvm-11.0.1.src/test/Transforms/PhaseOrdering/
H A Dbitfield-bittests.ll32 %bf.cast3 = zext i8 %bf.clear2 to i32
33 %or = or i32 %bf.cast, %bf.cast3
60 %bf.cast3 = zext i8 %bf.clear2 to i32
61 %or = or i32 %bf.cast, %bf.cast3
88 %bf.cast3 = zext i8 %bf.clear2 to i32
89 %and = and i32 %bf.cast, %bf.cast3
116 %bf.cast3 = zext i8 %bf.clear2 to i32
117 %and = and i32 %bf.cast, %bf.cast3
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/Transforms/PhaseOrdering/
H A Dbitfield-bittests.ll32 %bf.cast3 = zext i8 %bf.clear2 to i32
33 %or = or i32 %bf.cast, %bf.cast3
60 %bf.cast3 = zext i8 %bf.clear2 to i32
61 %or = or i32 %bf.cast, %bf.cast3
88 %bf.cast3 = zext i8 %bf.clear2 to i32
89 %and = and i32 %bf.cast, %bf.cast3
116 %bf.cast3 = zext i8 %bf.clear2 to i32
117 %and = and i32 %bf.cast, %bf.cast3
/dports/devel/llvm10/llvm-10.0.1.src/test/Transforms/PhaseOrdering/
H A Dbitfield-bittests.ll32 %bf.cast3 = zext i8 %bf.clear2 to i32
33 %or = or i32 %bf.cast, %bf.cast3
60 %bf.cast3 = zext i8 %bf.clear2 to i32
61 %or = or i32 %bf.cast, %bf.cast3
88 %bf.cast3 = zext i8 %bf.clear2 to i32
89 %and = and i32 %bf.cast, %bf.cast3
116 %bf.cast3 = zext i8 %bf.clear2 to i32
117 %and = and i32 %bf.cast, %bf.cast3
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/Transforms/PhaseOrdering/
H A Dbitfield-bittests.ll32 %bf.cast3 = zext i8 %bf.clear2 to i32
33 %or = or i32 %bf.cast, %bf.cast3
60 %bf.cast3 = zext i8 %bf.clear2 to i32
61 %or = or i32 %bf.cast, %bf.cast3
88 %bf.cast3 = zext i8 %bf.clear2 to i32
89 %and = and i32 %bf.cast, %bf.cast3
116 %bf.cast3 = zext i8 %bf.clear2 to i32
117 %and = and i32 %bf.cast, %bf.cast3
/dports/devel/llvm90/llvm-9.0.1.src/test/Transforms/PhaseOrdering/
H A Dbitfield-bittests.ll32 %bf.cast3 = zext i8 %bf.clear2 to i32
33 %or = or i32 %bf.cast, %bf.cast3
60 %bf.cast3 = zext i8 %bf.clear2 to i32
61 %or = or i32 %bf.cast, %bf.cast3
88 %bf.cast3 = zext i8 %bf.clear2 to i32
89 %and = and i32 %bf.cast, %bf.cast3
116 %bf.cast3 = zext i8 %bf.clear2 to i32
117 %and = and i32 %bf.cast, %bf.cast3
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/Transforms/PhaseOrdering/
H A Dbitfield-bittests.ll32 %bf.cast3 = zext i8 %bf.clear2 to i32
33 %or = or i32 %bf.cast, %bf.cast3
60 %bf.cast3 = zext i8 %bf.clear2 to i32
61 %or = or i32 %bf.cast, %bf.cast3
88 %bf.cast3 = zext i8 %bf.clear2 to i32
89 %and = and i32 %bf.cast, %bf.cast3
116 %bf.cast3 = zext i8 %bf.clear2 to i32
117 %and = and i32 %bf.cast, %bf.cast3
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/Transforms/PhaseOrdering/
H A Dbitfield-bittests.ll32 %bf.cast3 = zext i8 %bf.clear2 to i32
33 %or = or i32 %bf.cast, %bf.cast3
60 %bf.cast3 = zext i8 %bf.clear2 to i32
61 %or = or i32 %bf.cast, %bf.cast3
88 %bf.cast3 = zext i8 %bf.clear2 to i32
89 %and = and i32 %bf.cast, %bf.cast3
116 %bf.cast3 = zext i8 %bf.clear2 to i32
117 %and = and i32 %bf.cast, %bf.cast3
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/Transforms/PhaseOrdering/
H A Dbitfield-bittests.ll32 %bf.cast3 = zext i8 %bf.clear2 to i32
33 %or = or i32 %bf.cast, %bf.cast3
60 %bf.cast3 = zext i8 %bf.clear2 to i32
61 %or = or i32 %bf.cast, %bf.cast3
88 %bf.cast3 = zext i8 %bf.clear2 to i32
89 %and = and i32 %bf.cast, %bf.cast3
116 %bf.cast3 = zext i8 %bf.clear2 to i32
117 %and = and i32 %bf.cast, %bf.cast3
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/Transforms/PhaseOrdering/
H A Dbitfield-bittests.ll32 %bf.cast3 = zext i8 %bf.clear2 to i32
33 %or = or i32 %bf.cast, %bf.cast3
60 %bf.cast3 = zext i8 %bf.clear2 to i32
61 %or = or i32 %bf.cast, %bf.cast3
88 %bf.cast3 = zext i8 %bf.clear2 to i32
89 %and = and i32 %bf.cast, %bf.cast3
116 %bf.cast3 = zext i8 %bf.clear2 to i32
117 %and = and i32 %bf.cast, %bf.cast3
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/Transforms/PhaseOrdering/
H A Dbitfield-bittests.ll32 %bf.cast3 = zext i8 %bf.clear2 to i32
33 %or = or i32 %bf.cast, %bf.cast3
60 %bf.cast3 = zext i8 %bf.clear2 to i32
61 %or = or i32 %bf.cast, %bf.cast3
88 %bf.cast3 = zext i8 %bf.clear2 to i32
89 %and = and i32 %bf.cast, %bf.cast3
116 %bf.cast3 = zext i8 %bf.clear2 to i32
117 %and = and i32 %bf.cast, %bf.cast3
/dports/devel/llvm70/llvm-7.0.1.src/test/Transforms/PhaseOrdering/
H A Dbitfield-bittests.ll32 %bf.cast3 = zext i8 %bf.clear2 to i32
33 %or = or i32 %bf.cast, %bf.cast3
60 %bf.cast3 = zext i8 %bf.clear2 to i32
61 %or = or i32 %bf.cast, %bf.cast3
88 %bf.cast3 = zext i8 %bf.clear2 to i32
89 %and = and i32 %bf.cast, %bf.cast3
116 %bf.cast3 = zext i8 %bf.clear2 to i32
117 %and = and i32 %bf.cast, %bf.cast3
/dports/devel/llvm80/llvm-8.0.1.src/test/Transforms/PhaseOrdering/
H A Dbitfield-bittests.ll32 %bf.cast3 = zext i8 %bf.clear2 to i32
33 %or = or i32 %bf.cast, %bf.cast3
60 %bf.cast3 = zext i8 %bf.clear2 to i32
61 %or = or i32 %bf.cast, %bf.cast3
88 %bf.cast3 = zext i8 %bf.clear2 to i32
89 %and = and i32 %bf.cast, %bf.cast3
116 %bf.cast3 = zext i8 %bf.clear2 to i32
117 %and = and i32 %bf.cast, %bf.cast3
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/Transforms/PhaseOrdering/
H A Dbitfield-bittests.ll32 %bf.cast3 = zext i8 %bf.clear2 to i32
33 %or = or i32 %bf.cast, %bf.cast3
60 %bf.cast3 = zext i8 %bf.clear2 to i32
61 %or = or i32 %bf.cast, %bf.cast3
88 %bf.cast3 = zext i8 %bf.clear2 to i32
89 %and = and i32 %bf.cast, %bf.cast3
116 %bf.cast3 = zext i8 %bf.clear2 to i32
117 %and = and i32 %bf.cast, %bf.cast3
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/Transforms/PhaseOrdering/
H A Dbitfield-bittests.ll32 %bf.cast3 = zext i8 %bf.clear2 to i32
33 %or = or i32 %bf.cast, %bf.cast3
60 %bf.cast3 = zext i8 %bf.clear2 to i32
61 %or = or i32 %bf.cast, %bf.cast3
88 %bf.cast3 = zext i8 %bf.clear2 to i32
89 %and = and i32 %bf.cast, %bf.cast3
116 %bf.cast3 = zext i8 %bf.clear2 to i32
117 %and = and i32 %bf.cast, %bf.cast3
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AArch64/
H A Dneon-dot-product.ll57 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
58 …all <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
79 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
80 …all <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
101 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
102 …all <4 x i32> @llvm.aarch64.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
123 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
124 …all <4 x i32> @llvm.aarch64.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AArch64/
H A Dneon-dot-product.ll57 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
58 …all <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
79 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
80 …all <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
101 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
102 …all <4 x i32> @llvm.aarch64.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
123 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
124 …all <4 x i32> @llvm.aarch64.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/AArch64/
H A Dneon-dot-product.ll57 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
58 …all <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
79 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
80 …all <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
101 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
102 …all <4 x i32> @llvm.aarch64.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
123 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
124 …all <4 x i32> @llvm.aarch64.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Dneon-dot-product.ll123 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
124 …all <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
149 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
150 …all <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
179 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
207 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
237 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
238 …all <4 x i32> @llvm.aarch64.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
263 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
293 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AArch64/
H A Dneon-dot-product.ll123 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
124 …all <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
149 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
150 …all <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
179 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
207 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
237 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
238 …all <4 x i32> @llvm.aarch64.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
263 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
293 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AArch64/
H A Dneon-dot-product.ll123 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
124 …all <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
149 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
150 …all <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
179 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
207 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
237 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
238 …all <4 x i32> @llvm.aarch64.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
263 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
293 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Dneon-dot-product.ll123 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
124 …all <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
149 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
150 …all <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
179 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
207 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
237 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
238 …all <4 x i32> @llvm.aarch64.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
263 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
293 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Dneon-dot-product.ll123 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
124 …all <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
149 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
150 …all <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
179 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
207 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
237 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
238 …all <4 x i32> @llvm.aarch64.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2
263 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
293 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/clang/test/CodeGen/
H A Dibm128-cast.c20 long double cast3(__ibm128 x) { return x; } // expected-error {{returning '__ibm128' from a functio… in cast3() function
41 long double cast3(__ibm128 x) { return x; } // expected-no-error {{returning '__ibm128' from a func… in cast3() function
/dports/math/curv/curv-0.5/ideas/lib/noise/
H A DSS.curv178 let dpos = math::sub3(simplex_rel_coords, math::cast3(lattice_lookup));
181 let lattice_point = math::add3(simplex_base_point_i, math::cast3(lattice_lookup));
189 let dpos = math::sub3(second_simplex_rel_coords, math::cast3(lattice_lookup));
193 math::add3(second_simplex_base_point_i, math::cast3(lattice_lookup));

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