| /dports/science/openbabel/openbabel-3.1.1/test/ |
| H A D | tetrahedraltest.cpp | 208 OBTetrahedralStereo::Config cfg5; in test_Refs() local
209 OB_ASSERT( th.GetConfig() != cfg5 ); in test_Refs()
210 cfg5.center = 2; in test_Refs()
211 OB_ASSERT( th.GetConfig() != cfg5 ); in test_Refs()
212 cfg5.from = 34; in test_Refs()
213 OB_ASSERT( th.GetConfig() != cfg5 ); in test_Refs()
215 OB_ASSERT( th.GetConfig() == cfg5 ); in test_Refs()
216 cfg5.from = OBStereo::NoRef; in test_Refs()
217 OB_ASSERT( th.GetConfig() != cfg5 ); in test_Refs()
218 cfg5.center = OBStereo::NoRef; in test_Refs()
[all …]
|
| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/v3d/ |
| H A D | v3d_trace.h | 187 TP_PROTO(struct drm_device *dev, u32 cfg5, u32 cfg6),
188 TP_ARGS(dev, cfg5, cfg6),
192 __field(u32, cfg5)
198 __entry->cfg5 = cfg5;
204 __entry->cfg5,
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/v3d/ |
| H A D | v3d_trace.h | 187 TP_PROTO(struct drm_device *dev, u32 cfg5, u32 cfg6),
188 TP_ARGS(dev, cfg5, cfg6),
192 __field(u32, cfg5)
198 __entry->cfg5 = cfg5;
204 __entry->cfg5,
|
| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/v3d/ |
| H A D | v3d_trace.h | 187 TP_PROTO(struct drm_device *dev, u32 cfg5, u32 cfg6),
188 TP_ARGS(dev, cfg5, cfg6),
192 __field(u32, cfg5)
198 __entry->cfg5 = cfg5;
204 __entry->cfg5,
|
| /dports/emulators/qemu/qemu-6.2.0/hw/misc/ |
| H A D | mps2-scc.c | 138 r = s->cfg5;
218 s->cfg5 = value; in mps2_fpgaio_write()
293 s->cfg5 = 0;
341 VMSTATE_UINT32(cfg5, MPS2SCC), in mps2_fpgaio_class_init()
|
| /dports/emulators/qemu60/qemu-6.0.0/hw/misc/ |
| H A D | mps2-scc.c | 137 r = s->cfg5; in mps2_scc_read()
214 s->cfg5 = value; in mps2_scc_write()
289 s->cfg5 = 0; in mps2_scc_reset()
336 VMSTATE_UINT32(cfg5, MPS2SCC),
|
| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/misc/ |
| H A D | mps2-scc.c | 138 r = s->cfg5; in mps2_scc_read()
218 s->cfg5 = value; in mps2_scc_write()
293 s->cfg5 = 0; in mps2_scc_reset()
341 VMSTATE_UINT32(cfg5, MPS2SCC),
|
| /dports/emulators/qemu60/qemu-6.0.0/include/hw/misc/ |
| H A D | mps2-scc.h | 34 uint32_t cfg5; member
|
| /dports/emulators/qemu/qemu-6.2.0/include/hw/misc/ |
| H A D | mps2-scc.h | 52 uint32_t cfg5; member
|
| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/include/hw/misc/ |
| H A D | mps2-scc.h | 52 uint32_t cfg5; member
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/memory/tegra/ |
| H A D | tegra210-emc-core.c | 1224 u32 cmd_pad, dq_pad, rfu1, cfg5, common_tx, ramp_up_wait = 0; in tegra210_emc_dvfs_power_ramp_up() local
1235 cfg5 = timing->burst_regs[EMC_FBIO_CFG5_INDEX]; in tegra210_emc_dvfs_power_ramp_up()
1313 ccfifo_writel(emc, cfg5 & ~EMC_FBIO_CFG5_CMD_TX_DIS, in tegra210_emc_dvfs_power_ramp_up()
1319 ccfifo_writel(emc, cfg5 & ~EMC_FBIO_CFG5_CMD_TX_DIS, in tegra210_emc_dvfs_power_ramp_up()
1325 ccfifo_writel(emc, cfg5 & ~EMC_FBIO_CFG5_CMD_TX_DIS, in tegra210_emc_dvfs_power_ramp_up()
1339 u32 ramp_down_wait = 0, cmd_pad, dq_pad, rfu1, cfg5, common_tx; in tegra210_emc_dvfs_power_ramp_down() local
1351 cfg5 = entry->burst_regs[EMC_FBIO_CFG5_INDEX]; in tegra210_emc_dvfs_power_ramp_down()
1357 ccfifo_writel(emc, cfg5 | EMC_FBIO_CFG5_CMD_TX_DIS, in tegra210_emc_dvfs_power_ramp_down()
|
| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/hwmon/ |
| H A D | lm85.c | 59 ((data)->type == adt7468 && !((data)->cfg5 & ADT7468_OFF64))
61 ((data)->type == adt7468 && !((data)->cfg5 & ADT7468_HFPWM))
316 u8 cfg5; /* Config Register 5 on ADT7468 */ member
417 data->cfg5 = lm85_read_value(client, ADT7468_REG_CFG5); in lm85_update_device()
814 data->cfg5 &= ~ADT7468_HFPWM; in pwm_freq_store()
815 lm85_write_value(client, ADT7468_REG_CFG5, data->cfg5); in pwm_freq_store()
823 data->cfg5 |= ADT7468_HFPWM; in pwm_freq_store()
824 lm85_write_value(client, ADT7468_REG_CFG5, data->cfg5); in pwm_freq_store()
|
| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/memory/tegra/ |
| H A D | tegra210-emc-core.c | 1224 u32 cmd_pad, dq_pad, rfu1, cfg5, common_tx, ramp_up_wait = 0; in tegra210_emc_dvfs_power_ramp_up() local
1235 cfg5 = timing->burst_regs[EMC_FBIO_CFG5_INDEX]; in tegra210_emc_dvfs_power_ramp_up()
1313 ccfifo_writel(emc, cfg5 & ~EMC_FBIO_CFG5_CMD_TX_DIS, in tegra210_emc_dvfs_power_ramp_up()
1319 ccfifo_writel(emc, cfg5 & ~EMC_FBIO_CFG5_CMD_TX_DIS, in tegra210_emc_dvfs_power_ramp_up()
1325 ccfifo_writel(emc, cfg5 & ~EMC_FBIO_CFG5_CMD_TX_DIS, in tegra210_emc_dvfs_power_ramp_up()
1339 u32 ramp_down_wait = 0, cmd_pad, dq_pad, rfu1, cfg5, common_tx; in tegra210_emc_dvfs_power_ramp_down() local
1351 cfg5 = entry->burst_regs[EMC_FBIO_CFG5_INDEX]; in tegra210_emc_dvfs_power_ramp_down()
1357 ccfifo_writel(emc, cfg5 | EMC_FBIO_CFG5_CMD_TX_DIS, in tegra210_emc_dvfs_power_ramp_down()
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/hwmon/ |
| H A D | lm85.c | 59 ((data)->type == adt7468 && !((data)->cfg5 & ADT7468_OFF64))
61 ((data)->type == adt7468 && !((data)->cfg5 & ADT7468_HFPWM))
316 u8 cfg5; /* Config Register 5 on ADT7468 */ member
417 data->cfg5 = lm85_read_value(client, ADT7468_REG_CFG5); in lm85_update_device()
814 data->cfg5 &= ~ADT7468_HFPWM; in pwm_freq_store()
815 lm85_write_value(client, ADT7468_REG_CFG5, data->cfg5); in pwm_freq_store()
823 data->cfg5 |= ADT7468_HFPWM; in pwm_freq_store()
824 lm85_write_value(client, ADT7468_REG_CFG5, data->cfg5); in pwm_freq_store()
|
| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/memory/tegra/ |
| H A D | tegra210-emc-core.c | 1224 u32 cmd_pad, dq_pad, rfu1, cfg5, common_tx, ramp_up_wait = 0; in tegra210_emc_dvfs_power_ramp_up() local
1235 cfg5 = timing->burst_regs[EMC_FBIO_CFG5_INDEX]; in tegra210_emc_dvfs_power_ramp_up()
1313 ccfifo_writel(emc, cfg5 & ~EMC_FBIO_CFG5_CMD_TX_DIS, in tegra210_emc_dvfs_power_ramp_up()
1319 ccfifo_writel(emc, cfg5 & ~EMC_FBIO_CFG5_CMD_TX_DIS, in tegra210_emc_dvfs_power_ramp_up()
1325 ccfifo_writel(emc, cfg5 & ~EMC_FBIO_CFG5_CMD_TX_DIS, in tegra210_emc_dvfs_power_ramp_up()
1339 u32 ramp_down_wait = 0, cmd_pad, dq_pad, rfu1, cfg5, common_tx; in tegra210_emc_dvfs_power_ramp_down() local
1351 cfg5 = entry->burst_regs[EMC_FBIO_CFG5_INDEX]; in tegra210_emc_dvfs_power_ramp_down()
1357 ccfifo_writel(emc, cfg5 | EMC_FBIO_CFG5_CMD_TX_DIS, in tegra210_emc_dvfs_power_ramp_down()
|
| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/hwmon/ |
| H A D | lm85.c | 59 ((data)->type == adt7468 && !((data)->cfg5 & ADT7468_OFF64))
61 ((data)->type == adt7468 && !((data)->cfg5 & ADT7468_HFPWM))
316 u8 cfg5; /* Config Register 5 on ADT7468 */ member
417 data->cfg5 = lm85_read_value(client, ADT7468_REG_CFG5); in lm85_update_device()
814 data->cfg5 &= ~ADT7468_HFPWM; in pwm_freq_store()
815 lm85_write_value(client, ADT7468_REG_CFG5, data->cfg5); in pwm_freq_store()
823 data->cfg5 |= ADT7468_HFPWM; in pwm_freq_store()
824 lm85_write_value(client, ADT7468_REG_CFG5, data->cfg5); in pwm_freq_store()
|
| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/mips/kvm/ |
| H A D | mips.c | 1372 unsigned int sr, cfg5; in kvm_own_fpu() local
1394 cfg5 = kvm_read_c0_guest_config5(cop0); in kvm_own_fpu()
1395 change_c0_config5(MIPS_CONF5_FRE, cfg5); in kvm_own_fpu()
1416 unsigned int sr, cfg5; in kvm_own_msa() local
1438 cfg5 = kvm_read_c0_guest_config5(cop0); in kvm_own_msa()
1439 change_c0_config5(MIPS_CONF5_FRE, cfg5); in kvm_own_msa()
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/arch/mips/kvm/ |
| H A D | mips.c | 1372 unsigned int sr, cfg5; in kvm_own_fpu() local
1394 cfg5 = kvm_read_c0_guest_config5(cop0); in kvm_own_fpu()
1395 change_c0_config5(MIPS_CONF5_FRE, cfg5); in kvm_own_fpu()
1416 unsigned int sr, cfg5; in kvm_own_msa() local
1438 cfg5 = kvm_read_c0_guest_config5(cop0); in kvm_own_msa()
1439 change_c0_config5(MIPS_CONF5_FRE, cfg5); in kvm_own_msa()
|
| /dports/multimedia/libv4l/linux-5.13-rc2/arch/mips/kvm/ |
| H A D | mips.c | 1372 unsigned int sr, cfg5; in kvm_own_fpu() local
1394 cfg5 = kvm_read_c0_guest_config5(cop0); in kvm_own_fpu()
1395 change_c0_config5(MIPS_CONF5_FRE, cfg5); in kvm_own_fpu()
1416 unsigned int sr, cfg5; in kvm_own_msa() local
1438 cfg5 = kvm_read_c0_guest_config5(cop0); in kvm_own_msa()
1439 change_c0_config5(MIPS_CONF5_FRE, cfg5); in kvm_own_msa()
|
| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/net/ethernet/realtek/ |
| H A D | 8139too.c | 2313 u8 cfg5 = RTL_R8 (Config5); in rtl8139_get_wol() local
2325 if (cfg5 & Cfg5_UWF) in rtl8139_get_wol()
2327 if (cfg5 & Cfg5_MWF) in rtl8139_get_wol()
2329 if (cfg5 & Cfg5_BWF) in rtl8139_get_wol()
2344 u8 cfg3, cfg5; in rtl8139_set_wol() local
2363 cfg5 = RTL_R8 (Config5) & ~(Cfg5_UWF | Cfg5_MWF | Cfg5_BWF); in rtl8139_set_wol()
2368 cfg5 |= Cfg5_UWF; in rtl8139_set_wol()
2370 cfg5 |= Cfg5_MWF; in rtl8139_set_wol()
2372 cfg5 |= Cfg5_BWF; in rtl8139_set_wol()
2373 RTL_W8 (Config5, cfg5); /* need not unlock via Cfg9346 */ in rtl8139_set_wol()
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/net/ethernet/realtek/ |
| H A D | 8139too.c | 2313 u8 cfg5 = RTL_R8 (Config5); in rtl8139_get_wol() local
2325 if (cfg5 & Cfg5_UWF) in rtl8139_get_wol()
2327 if (cfg5 & Cfg5_MWF) in rtl8139_get_wol()
2329 if (cfg5 & Cfg5_BWF) in rtl8139_get_wol()
2344 u8 cfg3, cfg5; in rtl8139_set_wol() local
2363 cfg5 = RTL_R8 (Config5) & ~(Cfg5_UWF | Cfg5_MWF | Cfg5_BWF); in rtl8139_set_wol()
2368 cfg5 |= Cfg5_UWF; in rtl8139_set_wol()
2370 cfg5 |= Cfg5_MWF; in rtl8139_set_wol()
2372 cfg5 |= Cfg5_BWF; in rtl8139_set_wol()
2373 RTL_W8 (Config5, cfg5); /* need not unlock via Cfg9346 */ in rtl8139_set_wol()
|
| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/net/ethernet/realtek/ |
| H A D | 8139too.c | 2313 u8 cfg5 = RTL_R8 (Config5); in rtl8139_get_wol() local
2325 if (cfg5 & Cfg5_UWF) in rtl8139_get_wol()
2327 if (cfg5 & Cfg5_MWF) in rtl8139_get_wol()
2329 if (cfg5 & Cfg5_BWF) in rtl8139_get_wol()
2344 u8 cfg3, cfg5; in rtl8139_set_wol() local
2363 cfg5 = RTL_R8 (Config5) & ~(Cfg5_UWF | Cfg5_MWF | Cfg5_BWF); in rtl8139_set_wol()
2368 cfg5 |= Cfg5_UWF; in rtl8139_set_wol()
2370 cfg5 |= Cfg5_MWF; in rtl8139_set_wol()
2372 cfg5 |= Cfg5_BWF; in rtl8139_set_wol()
2373 RTL_W8 (Config5, cfg5); /* need not unlock via Cfg9346 */ in rtl8139_set_wol()
|
| /dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/arm/cpu/armv7/mx6/ |
| H A D | hab.c | 120 uint32_t reg = readl(&fuse->cfg5); in is_hab_enabled()
|
| /dports/astro/gpstk/GPSTk-8.0.0/core/tests/Utilities/ |
| H A D | StringUtils_T.cpp | 1092 HexDumpDataConfig cfg5(false, true, false, 4, 1, 1, 1, 0, 2, 8, false, in hexDumpDataConfigTest() local
1097 hexDumpData(hexDumpStream, hexDumpString, 0, cfg5); in hexDumpDataConfigTest()
|
| /dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/arm/include/asm/arch-mx6/ |
| H A D | imx-regs.h | 638 u32 cfg5; member
|