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Searched refs:chipmode (Results 1 – 25 of 124) sorted by relevance

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/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()
/dports/sysutils/u-boot-pcduino3/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()
/dports/sysutils/u-boot-pine-h64/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()
/dports/sysutils/u-boot-pine64/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()
/dports/sysutils/u-boot-pinebook/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()
/dports/sysutils/u-boot-pine64-lts/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/mips/mach-mtmips/mt7628/
H A Dinit.c52 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
66 chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; in print_cpuinfo()
78 ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, in print_cpuinfo()
79 chipmode & 0x02 ? "XTAL" : "CPLL"); in print_cpuinfo()

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