| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_rq_dlg_helpers.c | 308 dlg_regs.chunk_hdl_adjust_cur1); in print__dlg_regs_st()
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| H A D | display_mode_structs.h | 470 unsigned int chunk_hdl_adjust_cur1; member
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_rq_dlg_helpers.c | 308 dlg_regs.chunk_hdl_adjust_cur1); in print__dlg_regs_st()
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| H A D | display_mode_structs.h | 470 unsigned int chunk_hdl_adjust_cur1; member
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_rq_dlg_helpers.c | 308 dlg_regs.chunk_hdl_adjust_cur1); in print__dlg_regs_st()
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| H A D | display_mode_structs.h | 470 unsigned int chunk_hdl_adjust_cur1; member
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_hw_sequencer_debug.c | 275 … dlg_regs->chunk_hdl_adjust_cur1, dlg_regs->vready_after_vcount0, dlg_regs->dst_y_delta_drq_limit, in dcn10_get_dlg_states()
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| H A D | dcn10_hw_sequencer.c | 246 … dlg_regs->chunk_hdl_adjust_cur1, dlg_regs->vready_after_vcount0, dlg_regs->dst_y_delta_drq_limit, in dcn10_log_hubp_states()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_hw_sequencer_debug.c | 275 … dlg_regs->chunk_hdl_adjust_cur1, dlg_regs->vready_after_vcount0, dlg_regs->dst_y_delta_drq_limit, in dcn10_get_dlg_states()
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| H A D | dcn10_hw_sequencer.c | 246 … dlg_regs->chunk_hdl_adjust_cur1, dlg_regs->vready_after_vcount0, dlg_regs->dst_y_delta_drq_limit, in dcn10_log_hubp_states()
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_hw_sequencer_debug.c | 275 … dlg_regs->chunk_hdl_adjust_cur1, dlg_regs->vready_after_vcount0, dlg_regs->dst_y_delta_drq_limit, in dcn10_get_dlg_states()
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| H A D | dcn10_hw_sequencer.c | 246 … dlg_regs->chunk_hdl_adjust_cur1, dlg_regs->vready_after_vcount0, dlg_regs->dst_y_delta_drq_limit, in dcn10_log_hubp_states()
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | display_rq_dlg_calc_20.c | 1507 disp_dlg_regs->chunk_hdl_adjust_cur1 = 3; in dml20_rq_dlg_get_dlg_params()
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| H A D | display_rq_dlg_calc_20v2.c | 1508 disp_dlg_regs->chunk_hdl_adjust_cur1 = 3; in dml20v2_rq_dlg_get_dlg_params()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | display_rq_dlg_calc_20v2.c | 1508 disp_dlg_regs->chunk_hdl_adjust_cur1 = 3; in dml20v2_rq_dlg_get_dlg_params()
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| H A D | display_rq_dlg_calc_20.c | 1507 disp_dlg_regs->chunk_hdl_adjust_cur1 = 3; in dml20_rq_dlg_get_dlg_params()
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | display_rq_dlg_calc_20.c | 1507 disp_dlg_regs->chunk_hdl_adjust_cur1 = 3; in dml20_rq_dlg_get_dlg_params()
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| H A D | display_rq_dlg_calc_20v2.c | 1508 disp_dlg_regs->chunk_hdl_adjust_cur1 = 3; in dml20v2_rq_dlg_get_dlg_params()
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| H A D | display_rq_dlg_calc_21.c | 1615 disp_dlg_regs->chunk_hdl_adjust_cur1 = 3; in dml_rq_dlg_get_dlg_params()
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| H A D | display_rq_dlg_calc_21.c | 1615 disp_dlg_regs->chunk_hdl_adjust_cur1 = 3; in dml_rq_dlg_get_dlg_params()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| H A D | display_rq_dlg_calc_21.c | 1615 disp_dlg_regs->chunk_hdl_adjust_cur1 = 3; in dml_rq_dlg_get_dlg_params()
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | display_rq_dlg_calc_30.c | 1789 disp_dlg_regs->chunk_hdl_adjust_cur1 = 3; in dml_rq_dlg_get_dlg_params()
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | display_rq_dlg_calc_30.c | 1789 disp_dlg_regs->chunk_hdl_adjust_cur1 = 3; in dml_rq_dlg_get_dlg_params()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | display_rq_dlg_calc_30.c | 1789 disp_dlg_regs->chunk_hdl_adjust_cur1 = 3; in dml_rq_dlg_get_dlg_params()
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