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Searched refs:clk_mul (Results 1 – 25 of 157) sorted by relevance

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/dports/games/libretro-beetle_gba/beetle-gba-libretro-8d1e421/mednafen/hw_sound/gb_apu/
H A DGb_Oscs.cpp122 if ( delay > clk_mul ) in access()
238 delay = (delay & (4 * clk_mul - 1)) + period(); in write_register()
247 delay += 8 * clk_mul; in write_register()
299 (unsigned) (delay - 2 * clk_mul) < 2 * clk_mul ) in write_register()
303 delay = period() + 6 * clk_mul; in write_register()
354 if ( frequency() >= 0x7FA && delay < 32 * clk_mul ) in run()
517 int const period1 = period1s [regs [3] & 7] * clk_mul; in run()
591 if ( frequency() <= 0x7FB || delay > 15 * clk_mul ) in run()
H A DGb_Oscs.h28 enum { clk_mul = GB_APU_OVERCLOCK }; enumerator
86 int period() const { return (2048 - frequency()) * (4 * clk_mul); } in period()
127 delay = 4 * clk_mul; // TODO: remove? in reset()
164 int period() const { return (2048 - frequency()) * (2 * clk_mul); } in period()
/dports/emulators/visualboyadvance-m/visualboyadvance-m-VBA-M_Beta_2/src/apu/
H A DGb_Oscs.cpp122 if ( delay > clk_mul ) in access()
238 delay = (delay & (4 * clk_mul - 1)) + period(); in write_register()
247 delay += 8 * clk_mul; in write_register()
299 (unsigned) (delay - 2 * clk_mul) < 2 * clk_mul ) in write_register()
303 delay = period() + 6 * clk_mul; in write_register()
354 if ( frequency() >= 0x7FA && delay < 32 * clk_mul ) in run()
517 int const period1 = period1s [regs [3] & 7] * clk_mul; in run()
591 if ( frequency() <= 0x7FB || delay > 15 * clk_mul ) in run()
H A DGb_Oscs.h28 enum { clk_mul = GB_APU_OVERCLOCK }; enumerator
87 int period() const { return (2048 - frequency()) * (4 * clk_mul); } in period()
128 delay = 4 * clk_mul; // TODO: remove? in reset()
165 int period() const { return (2048 - frequency()) * (2 * clk_mul); } in period()
/dports/emulators/mednafen/mednafen/src/hw_sound/gb_apu/
H A DGb_Oscs.cpp122 if ( delay > clk_mul ) in access()
238 delay = (delay & (4 * clk_mul - 1)) + period(); in write_register()
247 delay += 8 * clk_mul; in write_register()
299 (unsigned) (delay - 2 * clk_mul) < 2 * clk_mul ) in write_register()
303 delay = period() + 6 * clk_mul; in write_register()
354 if ( frequency() >= 0x7FA && delay < 32 * clk_mul ) in run()
517 int const period1 = period1s [regs [3] & 7] * clk_mul; in run()
591 if ( frequency() <= 0x7FB || delay > 15 * clk_mul ) in run()
H A DGb_Oscs.h28 enum { clk_mul = GB_APU_OVERCLOCK }; enumerator
86 int period() const { return (2048 - frequency()) * (4 * clk_mul); } in period()
127 delay = 4 * clk_mul; // TODO: remove? in reset()
164 int period() const { return (2048 - frequency()) * (2 * clk_mul); } in period()
/dports/audio/deadbeef/deadbeef-0.7.2/plugins/gme/game-music-emu-0.6pre/gme/
H A DGb_Oscs.h28 enum { clk_mul = GB_APU_OVERCLOCK }; enumerator
84 int period() const { return (2048 - frequency()) * (4 * clk_mul); } in period()
124 delay = 4 * clk_mul; // TODO: remove? in reset()
162 int period() const { return (2048 - frequency()) * (2 * clk_mul); } in period()
H A DGb_Oscs.cpp122 if ( delay > clk_mul ) in access()
238 delay = (delay & (4 * clk_mul - 1)) + period(); in write_register()
247 delay += 8 * clk_mul; in write_register()
299 (unsigned) (delay - 2 * clk_mul) < 2 * clk_mul ) in write_register()
303 delay = period() + 6 * clk_mul; in write_register()
356 if ( frequency() >= 0x7FA && delay < 32 * clk_mul ) in run()
525 int const period1 = period1s [regs [3] & 7] * clk_mul; in run()
627 if ( frequency() <= 0x7FB || delay > 15 * clk_mul ) in run()
/dports/multimedia/musikcube/musikcube-0.96.7/src/plugins/gmedecoder/gme/
H A DGb_Oscs.h28 enum { clk_mul = GB_APU_OVERCLOCK }; enumerator
84 int period() const { return (2048 - frequency()) * (4 * clk_mul); } in period()
124 delay = 4 * clk_mul; // TODO: remove? in reset()
162 int period() const { return (2048 - frequency()) * (2 * clk_mul); } in period()
H A DGb_Oscs.cpp122 if ( delay > clk_mul ) in access()
238 delay = (delay & (4 * clk_mul - 1)) + period(); in write_register()
247 delay += 8 * clk_mul; in write_register()
299 (unsigned) (delay - 2 * clk_mul) < 2 * clk_mul ) in write_register()
303 delay = period() + 6 * clk_mul; in write_register()
356 if ( frequency() >= 0x7FA && delay < 32 * clk_mul ) in run()
525 int const period1 = period1s [regs [3] & 7] * clk_mul; in run()
627 if ( frequency() <= 0x7FB || delay > 15 * clk_mul ) in run()
/dports/converters/wkhtmltopdf/qt-5db36ec/demos/spectrum/3rdparty/fftreal/stopwatch/
H A DClockCycleCounter.cpp200 const double clk_mul = nbr_cycles / static_cast <double> (diff_time_c); in compute_clk_mul() local
202 _clk_mul = round_int (clk_mul); in compute_clk_mul()
/dports/audio/madronalib/madronalib-1.6-1016-g103895f/external/ffft/test/stopwatch/
H A DClockCycleCounter.cpp192 const double clk_mul = nbr_cycles / static_cast <double> (diff_time_c); in compute_clk_mul() local
194 _clk_mul = round_int (clk_mul); in compute_clk_mul()
/dports/misc/qt5-examples/qt-everywhere-src-5.15.2/qtmultimedia/examples/multimedia/spectrum/3rdparty/fftreal/stopwatch/
H A DClockCycleCounter.cpp200 const double clk_mul = nbr_cycles / static_cast <double> (diff_time_c); in compute_clk_mul() local
202 _clk_mul = round_int (clk_mul); in compute_clk_mul()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/mmc/host/
H A Dsdhci-of-at91.c168 unsigned int clk_base, clk_mul; in sdhci_at91_set_clks_presets() local
183 clk_mul = gck_rate / clk_base_rate - 1; in sdhci_at91_set_clks_presets()
188 caps1 |= FIELD_PREP(SDHCI_CLOCK_MUL_MASK, clk_mul); in sdhci_at91_set_clks_presets()
197 clk_mul, gck_rate, clk_base_rate); in sdhci_at91_set_clks_presets()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/mmc/host/
H A Dsdhci-of-at91.c168 unsigned int clk_base, clk_mul; in sdhci_at91_set_clks_presets() local
183 clk_mul = gck_rate / clk_base_rate - 1; in sdhci_at91_set_clks_presets()
188 caps1 |= FIELD_PREP(SDHCI_CLOCK_MUL_MASK, clk_mul); in sdhci_at91_set_clks_presets()
197 clk_mul, gck_rate, clk_base_rate); in sdhci_at91_set_clks_presets()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/mmc/host/
H A Dsdhci-of-at91.c168 unsigned int clk_base, clk_mul; in sdhci_at91_set_clks_presets() local
183 clk_mul = gck_rate / clk_base_rate - 1; in sdhci_at91_set_clks_presets()
188 caps1 |= FIELD_PREP(SDHCI_CLOCK_MUL_MASK, clk_mul); in sdhci_at91_set_clks_presets()
197 clk_mul, gck_rate, clk_base_rate); in sdhci_at91_set_clks_presets()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/mmc/
H A Dsdhci.c361 if (host->clk_mul) {
588 host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >>
600 if (host->clk_mul)
601 host->max_clk *= host->clk_mul;
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/mmc/
H A Dsdhci.c361 if (host->clk_mul) {
588 host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >>
600 if (host->clk_mul)
601 host->max_clk *= host->clk_mul;
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/mmc/
H A Dsdhci.c361 if (host->clk_mul) {
588 host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >>
600 if (host->clk_mul)
601 host->max_clk *= host->clk_mul;
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/mmc/
H A Dsdhci.c361 if (host->clk_mul) {
588 host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >>
600 if (host->clk_mul)
601 host->max_clk *= host->clk_mul;
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/drivers/mmc/
H A Dsdhci.c361 if (host->clk_mul) {
588 host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >>
600 if (host->clk_mul)
601 host->max_clk *= host->clk_mul;
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/clk/
H A Dclk-versaclock5.c189 struct clk_hw clk_mul; member
283 container_of(hw, struct vc5_driver_data, clk_mul); in vc5_dbl_recalc_rate()
306 container_of(hw, struct vc5_driver_data, clk_mul); in vc5_dbl_set_rate()
971 vc5->clk_mul.init = &init; in vc5_probe()
972 ret = devm_clk_hw_register(&client->dev, &vc5->clk_mul); in vc5_probe()
985 parent_names[0] = clk_hw_get_name(&vc5->clk_mul); in vc5_probe()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/clk/
H A Dclk-versaclock5.c189 struct clk_hw clk_mul; member
283 container_of(hw, struct vc5_driver_data, clk_mul); in vc5_dbl_recalc_rate()
306 container_of(hw, struct vc5_driver_data, clk_mul); in vc5_dbl_set_rate()
971 vc5->clk_mul.init = &init; in vc5_probe()
972 ret = devm_clk_hw_register(&client->dev, &vc5->clk_mul); in vc5_probe()
985 parent_names[0] = clk_hw_get_name(&vc5->clk_mul); in vc5_probe()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/clk/
H A Dclk-versaclock5.c189 struct clk_hw clk_mul; member
283 container_of(hw, struct vc5_driver_data, clk_mul); in vc5_dbl_recalc_rate()
306 container_of(hw, struct vc5_driver_data, clk_mul); in vc5_dbl_set_rate()
971 vc5->clk_mul.init = &init; in vc5_probe()
972 ret = devm_clk_hw_register(&client->dev, &vc5->clk_mul); in vc5_probe()
985 parent_names[0] = clk_hw_get_name(&vc5->clk_mul); in vc5_probe()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/mmc/
H A Dsdhci.c397 if (host->clk_mul) {
855 host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >>
867 if (host->clk_mul)
868 host->max_clk *= host->clk_mul;

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