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Searched refs:cur_max_pup (Results 1 – 25 of 63) sorted by relevance

123

/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c141 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
147 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
150 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
411 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
436 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
583 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
589 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
592 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
708 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
923 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c141 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
147 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
150 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
411 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
436 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
583 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
589 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
592 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
708 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
923 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c142 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
148 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
151 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
412 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
437 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
584 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
590 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
593 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
709 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
924 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c142 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
148 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
151 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
412 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
437 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
584 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
590 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
593 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
709 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
924 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c142 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
148 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
151 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
412 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
437 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
584 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
590 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
593 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
709 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
924 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c142 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
148 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
151 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
412 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
437 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
584 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
590 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
593 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
709 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
924 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c141 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
147 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
150 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
411 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
436 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
583 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
589 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
592 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
708 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
923 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c142 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
148 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
151 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
412 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
437 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
584 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
590 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
593 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
709 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
924 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c142 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
148 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
151 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
412 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
437 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
584 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
590 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
593 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
709 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
924 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c142 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
148 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
151 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
412 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
437 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
584 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
590 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
593 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
709 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
924 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c142 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
148 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
151 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
412 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
437 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
584 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
590 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
593 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
709 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
924 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c142 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
148 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
151 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
412 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
437 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
584 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
590 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
593 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
709 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
924 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c142 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
148 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
151 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
412 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
437 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
584 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
590 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
593 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
709 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
924 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c142 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
148 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
151 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
412 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
437 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
584 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
590 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
593 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
709 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
924 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c142 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
148 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
151 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
412 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
437 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
584 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
590 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
593 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
709 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
924 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c142 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
148 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
151 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
412 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
437 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
584 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
590 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
593 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
709 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
924 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c142 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
148 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
151 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
412 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
437 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
584 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
590 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
593 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
709 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
924 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c142 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
148 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
151 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
412 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
437 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
584 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
590 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
593 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
709 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
924 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c142 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
148 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
151 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
412 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
437 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
584 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
590 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
593 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
709 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
924 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c142 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
148 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
151 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
412 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
437 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
584 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
590 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
593 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
709 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
924 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]
/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c142 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
148 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
151 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
412 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
437 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
584 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
590 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
593 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
709 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
924 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c142 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
148 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
151 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
412 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
437 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
584 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
590 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
593 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
709 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
924 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c141 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
147 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
150 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
411 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
436 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
583 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
589 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
592 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
708 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
923 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c142 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
148 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
151 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
412 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
437 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
584 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
590 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
593 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
709 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
924 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c142 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
148 } else if (cur_max_pup > 4) { in ddr3_pbs_tx()
151 } else if (cur_max_pup == 4) { in ddr3_pbs_tx()
412 u32 cur_max_pup, pup; in ddr3_tx_shift_dqs_adll_step_before_fail() local
437 cur_max_pup = 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
584 cur_max_pup = (1 - ecc) * in ddr3_pbs_rx()
590 } else if (cur_max_pup > 4) { in ddr3_pbs_rx()
593 } else if (cur_max_pup == 4) { in ddr3_pbs_rx()
709 for (pup = 0; pup < cur_max_pup; in ddr3_pbs_rx()
924 u32 cur_max_pup, pup, pass_pup; in ddr3_rx_shift_dqs_to_first_fail() local
[all …]

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