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Searched refs:cycle_5_0_clk (Results 1 – 16 of 16) sorted by relevance

/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/
H A Ddenali_spd_ddr2.c559 unsigned long cycle_5_0_clk; in program_ddr0_03() local
642 cycle_5_0_clk = MULDIV64(ONE_BILLION, 1000, max_5_0_tcyc_ps) + 10; in program_ddr0_03()
646 debug("cycle_5_0_clk = %d\n", cycle_5_0_clk); in program_ddr0_03()
660 } else if ((cas_available & 0x20) && (sdram_freq <= cycle_5_0_clk)) { in program_ddr0_03()
673 cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk); in program_ddr0_03()
H A D44x_spd_ddr2.c1446 unsigned long cycle_5_0_clk; in program_mode() local
1640 cycle_5_0_clk = MULDIV64(ONE_BILLION, 100, max_5_0_tcyc_ns_x_100) + 10; in program_mode()
1643 debug("cycle_5_0_clk=%lu\n", cycle_5_0_clk); in program_mode()
1671 } else if ((cas_5_0_available == TRUE) && (sdram_freq <= cycle_5_0_clk)) { in program_mode()
1681 sdram_freq, cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk); in program_mode()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/
H A Ddenali_spd_ddr2.c559 unsigned long cycle_5_0_clk; in program_ddr0_03() local
642 cycle_5_0_clk = MULDIV64(ONE_BILLION, 1000, max_5_0_tcyc_ps) + 10; in program_ddr0_03()
646 debug("cycle_5_0_clk = %d\n", cycle_5_0_clk); in program_ddr0_03()
660 } else if ((cas_available & 0x20) && (sdram_freq <= cycle_5_0_clk)) { in program_ddr0_03()
673 cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk); in program_ddr0_03()
H A D44x_spd_ddr2.c1446 unsigned long cycle_5_0_clk; in program_mode() local
1640 cycle_5_0_clk = MULDIV64(ONE_BILLION, 100, max_5_0_tcyc_ns_x_100) + 10; in program_mode()
1643 debug("cycle_5_0_clk=%lu\n", cycle_5_0_clk); in program_mode()
1671 } else if ((cas_5_0_available == TRUE) && (sdram_freq <= cycle_5_0_clk)) { in program_mode()
1681 sdram_freq, cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk); in program_mode()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/
H A Ddenali_spd_ddr2.c559 unsigned long cycle_5_0_clk; in program_ddr0_03() local
642 cycle_5_0_clk = MULDIV64(ONE_BILLION, 1000, max_5_0_tcyc_ps) + 10; in program_ddr0_03()
646 debug("cycle_5_0_clk = %d\n", cycle_5_0_clk); in program_ddr0_03()
660 } else if ((cas_available & 0x20) && (sdram_freq <= cycle_5_0_clk)) { in program_ddr0_03()
673 cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk); in program_ddr0_03()
H A D44x_spd_ddr2.c1446 unsigned long cycle_5_0_clk; in program_mode() local
1640 cycle_5_0_clk = MULDIV64(ONE_BILLION, 100, max_5_0_tcyc_ns_x_100) + 10; in program_mode()
1643 debug("cycle_5_0_clk=%lu\n", cycle_5_0_clk); in program_mode()
1671 } else if ((cas_5_0_available == TRUE) && (sdram_freq <= cycle_5_0_clk)) { in program_mode()
1681 sdram_freq, cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk); in program_mode()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/
H A Ddenali_spd_ddr2.c559 unsigned long cycle_5_0_clk; in program_ddr0_03() local
642 cycle_5_0_clk = MULDIV64(ONE_BILLION, 1000, max_5_0_tcyc_ps) + 10; in program_ddr0_03()
646 debug("cycle_5_0_clk = %d\n", cycle_5_0_clk); in program_ddr0_03()
660 } else if ((cas_available & 0x20) && (sdram_freq <= cycle_5_0_clk)) { in program_ddr0_03()
673 cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk); in program_ddr0_03()
H A D44x_spd_ddr2.c1446 unsigned long cycle_5_0_clk; in program_mode() local
1640 cycle_5_0_clk = MULDIV64(ONE_BILLION, 100, max_5_0_tcyc_ns_x_100) + 10; in program_mode()
1643 debug("cycle_5_0_clk=%lu\n", cycle_5_0_clk); in program_mode()
1671 } else if ((cas_5_0_available == TRUE) && (sdram_freq <= cycle_5_0_clk)) { in program_mode()
1681 sdram_freq, cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk); in program_mode()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/
H A Ddenali_spd_ddr2.c559 unsigned long cycle_5_0_clk; in program_ddr0_03() local
642 cycle_5_0_clk = MULDIV64(ONE_BILLION, 1000, max_5_0_tcyc_ps) + 10; in program_ddr0_03()
646 debug("cycle_5_0_clk = %d\n", cycle_5_0_clk); in program_ddr0_03()
660 } else if ((cas_available & 0x20) && (sdram_freq <= cycle_5_0_clk)) { in program_ddr0_03()
673 cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk); in program_ddr0_03()
H A D44x_spd_ddr2.c1446 unsigned long cycle_5_0_clk; in program_mode() local
1640 cycle_5_0_clk = MULDIV64(ONE_BILLION, 100, max_5_0_tcyc_ns_x_100) + 10; in program_mode()
1643 debug("cycle_5_0_clk=%lu\n", cycle_5_0_clk); in program_mode()
1671 } else if ((cas_5_0_available == TRUE) && (sdram_freq <= cycle_5_0_clk)) { in program_mode()
1681 sdram_freq, cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk); in program_mode()
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/
H A Ddenali_spd_ddr2.c559 unsigned long cycle_5_0_clk; in program_ddr0_03() local
642 cycle_5_0_clk = MULDIV64(ONE_BILLION, 1000, max_5_0_tcyc_ps) + 10; in program_ddr0_03()
646 debug("cycle_5_0_clk = %d\n", cycle_5_0_clk); in program_ddr0_03()
660 } else if ((cas_available & 0x20) && (sdram_freq <= cycle_5_0_clk)) { in program_ddr0_03()
673 cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk); in program_ddr0_03()
H A D44x_spd_ddr2.c1446 unsigned long cycle_5_0_clk; in program_mode() local
1640 cycle_5_0_clk = MULDIV64(ONE_BILLION, 100, max_5_0_tcyc_ns_x_100) + 10; in program_mode()
1643 debug("cycle_5_0_clk=%lu\n", cycle_5_0_clk); in program_mode()
1671 } else if ((cas_5_0_available == TRUE) && (sdram_freq <= cycle_5_0_clk)) { in program_mode()
1681 sdram_freq, cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk); in program_mode()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/powerpc/cpu/ppc4xx/
H A Ddenali_spd_ddr2.c535 unsigned long cycle_5_0_clk; in program_ddr0_03() local
618 cycle_5_0_clk = MULDIV64(ONE_BILLION, 1000, max_5_0_tcyc_ps) + 10; in program_ddr0_03()
622 debug("cycle_5_0_clk = %ld\n", cycle_5_0_clk); in program_ddr0_03()
636 } else if ((cas_available & 0x20) && (sdram_freq <= cycle_5_0_clk)) { in program_ddr0_03()
649 cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk); in program_ddr0_03()
H A D44x_spd_ddr2.c1419 unsigned long cycle_5_0_clk; in program_mode() local
1612 cycle_5_0_clk = MULDIV64(ONE_BILLION, 100, max_5_0_tcyc_ns_x_100) + 10; in program_mode()
1615 debug("cycle_5_0_clk=%lu\n", cycle_5_0_clk); in program_mode()
1649 (sdram_freq <= cycle_5_0_clk)) { in program_mode()
1659 sdram_freq, cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk); in program_mode()
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/
H A Ddenali_spd_ddr2.c559 unsigned long cycle_5_0_clk; in program_ddr0_03() local
642 cycle_5_0_clk = MULDIV64(ONE_BILLION, 1000, max_5_0_tcyc_ps) + 10; in program_ddr0_03()
646 debug("cycle_5_0_clk = %d\n", cycle_5_0_clk); in program_ddr0_03()
660 } else if ((cas_available & 0x20) && (sdram_freq <= cycle_5_0_clk)) { in program_ddr0_03()
673 cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk); in program_ddr0_03()
H A D44x_spd_ddr2.c1446 unsigned long cycle_5_0_clk; in program_mode() local
1640 cycle_5_0_clk = MULDIV64(ONE_BILLION, 100, max_5_0_tcyc_ns_x_100) + 10; in program_mode()
1643 debug("cycle_5_0_clk=%lu\n", cycle_5_0_clk); in program_mode()
1671 } else if ((cas_5_0_available == TRUE) && (sdram_freq <= cycle_5_0_clk)) { in program_mode()
1681 sdram_freq, cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk); in program_mode()