/dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/tcg/mips/ |
H A D | tcg-target.c | 609 int data_regl, data_regh, data_reg1, data_reg2; in tcg_out_qemu_ld() local 621 data_regl = *args++; in tcg_out_qemu_ld() 636 data_reg2 = data_regl; in tcg_out_qemu_ld() 638 data_reg1 = data_regl; in tcg_out_qemu_ld() 642 data_reg1 = data_regl; in tcg_out_qemu_ld() 800 int data_regl, data_regh, data_reg1, data_reg2; in tcg_out_qemu_st() local 813 data_regl = *args++; in tcg_out_qemu_st() 818 data_reg2 = data_regl; in tcg_out_qemu_st() 820 data_reg1 = data_regl; in tcg_out_qemu_st() 824 data_reg1 = data_regl; in tcg_out_qemu_st()
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/dports/emulators/unicorn/unicorn-1.0.2/qemu/tcg/mips/ |
H A D | tcg-target.c | 1154 TCGReg data_regl, data_regh; in tcg_out_qemu_ld() local 1165 data_regl = *args++; in tcg_out_qemu_ld() 1177 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc); in tcg_out_qemu_ld() 1178 add_qemu_ldst_label(s, 1, opc, data_regl, data_regh, addr_regl, addr_regh, in tcg_out_qemu_ld() 1181 if (GUEST_BASE == 0 && data_regl != addr_regl) { in tcg_out_qemu_ld() 1189 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc); in tcg_out_qemu_ld() 1283 TCGReg data_regl, data_regh, base; in tcg_out_qemu_st() local 1291 data_regl = *args++; in tcg_out_qemu_st() 1306 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc); in tcg_out_qemu_st() 1307 add_qemu_ldst_label(s, 0, opc, data_regl, data_regh, addr_regl, addr_regh, in tcg_out_qemu_st() [all …]
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/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/tcg/mips/ |
H A D | tcg-target.c | 1154 TCGReg data_regl, data_regh; 1165 data_regl = *args++; 1177 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc); 1178 add_qemu_ldst_label(s, 1, opc, data_regl, data_regh, addr_regl, addr_regh, 1181 if (GUEST_BASE == 0 && data_regl != addr_regl) { 1189 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc); 1283 TCGReg data_regl, data_regh, base; 1291 data_regl = *args++; 1306 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc); 1307 add_qemu_ldst_label(s, 0, opc, data_regl, data_regh, addr_regl, addr_regh, [all …]
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/dports/emulators/qemu-utils/qemu-4.2.1/tcg/riscv/ |
H A D | tcg-target.inc.c | 1173 TCGReg data_regl, data_regh; in tcg_out_qemu_ld() local 1181 data_regl = *args++; in tcg_out_qemu_ld() 1190 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); in tcg_out_qemu_ld() 1193 data_regl, data_regh, addr_regl, addr_regh, in tcg_out_qemu_ld() 1206 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); in tcg_out_qemu_ld() 1244 TCGReg data_regl, data_regh; in tcg_out_qemu_st() local 1252 data_regl = *args++; in tcg_out_qemu_st() 1261 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc); in tcg_out_qemu_st() 1264 data_regl, data_regh, addr_regl, addr_regh, in tcg_out_qemu_st() 1277 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc); in tcg_out_qemu_st()
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/tcg/riscv/ |
H A D | tcg-target.inc.c | 1173 TCGReg data_regl, data_regh; in tcg_out_qemu_ld() local 1181 data_regl = *args++; in tcg_out_qemu_ld() 1190 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); in tcg_out_qemu_ld() 1193 data_regl, data_regh, addr_regl, addr_regh, in tcg_out_qemu_ld() 1206 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); in tcg_out_qemu_ld() 1244 TCGReg data_regl, data_regh; in tcg_out_qemu_st() local 1252 data_regl = *args++; in tcg_out_qemu_st() 1261 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc); in tcg_out_qemu_st() 1264 data_regl, data_regh, addr_regl, addr_regh, in tcg_out_qemu_st() 1277 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc); in tcg_out_qemu_st()
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/dports/emulators/qemu42/qemu-4.2.1/tcg/riscv/ |
H A D | tcg-target.inc.c | 1173 TCGReg data_regl, data_regh; in tcg_out_qemu_ld() local 1181 data_regl = *args++; in tcg_out_qemu_ld() 1190 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); in tcg_out_qemu_ld() 1193 data_regl, data_regh, addr_regl, addr_regh, in tcg_out_qemu_ld() 1206 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); in tcg_out_qemu_ld() 1244 TCGReg data_regl, data_regh; in tcg_out_qemu_st() local 1252 data_regl = *args++; in tcg_out_qemu_st() 1261 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc); in tcg_out_qemu_st() 1264 data_regl, data_regh, addr_regl, addr_regh, in tcg_out_qemu_st() 1277 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc); in tcg_out_qemu_st()
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/tcg/riscv/ |
H A D | tcg-target.inc.c | 1173 TCGReg data_regl, data_regh; in tcg_out_qemu_ld() local 1181 data_regl = *args++; in tcg_out_qemu_ld() 1190 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); in tcg_out_qemu_ld() 1193 data_regl, data_regh, addr_regl, addr_regh, in tcg_out_qemu_ld() 1206 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); in tcg_out_qemu_ld() 1244 TCGReg data_regl, data_regh; in tcg_out_qemu_st() local 1252 data_regl = *args++; in tcg_out_qemu_st() 1261 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc); in tcg_out_qemu_st() 1264 data_regl, data_regh, addr_regl, addr_regh, in tcg_out_qemu_st() 1277 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc); in tcg_out_qemu_st()
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/dports/emulators/qemu-utils/qemu-4.2.1/tcg/mips/ |
H A D | tcg-target.inc.c | 1522 TCGReg data_regl, data_regh; in tcg_out_qemu_ld() local 1530 data_regl = *args++; in tcg_out_qemu_ld() 1539 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); in tcg_out_qemu_ld() 1542 data_regl, data_regh, addr_regl, addr_regh, in tcg_out_qemu_ld() 1549 if (guest_base == 0 && data_regl != addr_regl) { in tcg_out_qemu_ld() 1556 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); in tcg_out_qemu_ld() 1625 TCGReg data_regl, data_regh; in tcg_out_qemu_st() local 1633 data_regl = *args++; in tcg_out_qemu_st() 1642 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc); in tcg_out_qemu_st() 1645 data_regl, data_regh, addr_regl, addr_regh, in tcg_out_qemu_st() [all …]
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/tcg/mips/ |
H A D | tcg-target.inc.c | 1522 TCGReg data_regl, data_regh; in tcg_out_qemu_ld() local 1530 data_regl = *args++; in tcg_out_qemu_ld() 1539 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); in tcg_out_qemu_ld() 1542 data_regl, data_regh, addr_regl, addr_regh, in tcg_out_qemu_ld() 1549 if (guest_base == 0 && data_regl != addr_regl) { in tcg_out_qemu_ld() 1556 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); in tcg_out_qemu_ld() 1625 TCGReg data_regl, data_regh; in tcg_out_qemu_st() local 1633 data_regl = *args++; in tcg_out_qemu_st() 1642 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc); in tcg_out_qemu_st() 1645 data_regl, data_regh, addr_regl, addr_regh, in tcg_out_qemu_st() [all …]
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/dports/emulators/qemu42/qemu-4.2.1/tcg/mips/ |
H A D | tcg-target.inc.c | 1522 TCGReg data_regl, data_regh; in tcg_out_qemu_ld() local 1530 data_regl = *args++; in tcg_out_qemu_ld() 1539 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); in tcg_out_qemu_ld() 1542 data_regl, data_regh, addr_regl, addr_regh, in tcg_out_qemu_ld() 1549 if (guest_base == 0 && data_regl != addr_regl) { in tcg_out_qemu_ld() 1556 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); in tcg_out_qemu_ld() 1625 TCGReg data_regl, data_regh; in tcg_out_qemu_st() local 1633 data_regl = *args++; in tcg_out_qemu_st() 1642 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc); in tcg_out_qemu_st() 1645 data_regl, data_regh, addr_regl, addr_regh, in tcg_out_qemu_st() [all …]
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/tcg/mips/ |
H A D | tcg-target.inc.c | 1519 TCGReg data_regl, data_regh; in tcg_out_qemu_ld() local 1527 data_regl = *args++; in tcg_out_qemu_ld() 1536 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); in tcg_out_qemu_ld() 1539 data_regl, data_regh, addr_regl, addr_regh, in tcg_out_qemu_ld() 1546 if (guest_base == 0 && data_regl != addr_regl) { in tcg_out_qemu_ld() 1553 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); in tcg_out_qemu_ld() 1622 TCGReg data_regl, data_regh; in tcg_out_qemu_st() local 1630 data_regl = *args++; in tcg_out_qemu_st() 1639 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc); in tcg_out_qemu_st() 1642 data_regl, data_regh, addr_regl, addr_regh, in tcg_out_qemu_st() [all …]
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/tcg/mips/ |
H A D | tcg-target.inc.c | 1522 TCGReg data_regl, data_regh; in tcg_out_qemu_ld() local 1530 data_regl = *args++; in tcg_out_qemu_ld() 1539 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); in tcg_out_qemu_ld() 1542 data_regl, data_regh, addr_regl, addr_regh, in tcg_out_qemu_ld() 1549 if (guest_base == 0 && data_regl != addr_regl) { in tcg_out_qemu_ld() 1556 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); in tcg_out_qemu_ld() 1625 TCGReg data_regl, data_regh; in tcg_out_qemu_st() local 1633 data_regl = *args++; in tcg_out_qemu_st() 1642 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc); in tcg_out_qemu_st() 1645 data_regl, data_regh, addr_regl, addr_regh, in tcg_out_qemu_st() [all …]
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/dports/emulators/qemu5/qemu-5.2.0/tcg/riscv/ |
H A D | tcg-target.c.inc | 1169 TCGReg data_regl, data_regh; 1177 data_regl = *args++; 1186 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); 1189 data_regl, data_regh, addr_regl, addr_regh, 1202 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); 1240 TCGReg data_regl, data_regh; 1248 data_regl = *args++; 1257 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc); 1260 data_regl, data_regh, addr_regl, addr_regh, 1273 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc);
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/tcg/riscv/ |
H A D | tcg-target.c.inc | 1106 TCGReg data_regl, data_regh; 1114 data_regl = *args++; 1123 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); 1126 data_regl, data_regh, addr_regl, addr_regh, 1136 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); 1172 TCGReg data_regl, data_regh; 1180 data_regl = *args++; 1189 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc); 1192 data_regl, data_regh, addr_regl, addr_regh, 1202 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc);
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/dports/emulators/qemu/qemu-6.2.0/tcg/riscv/ |
H A D | tcg-target.c.inc | 1106 TCGReg data_regl, data_regh; 1114 data_regl = *args++; 1123 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); 1126 data_regl, data_regh, addr_regl, addr_regh, 1136 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); 1172 TCGReg data_regl, data_regh; 1180 data_regl = *args++; 1189 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc); 1192 data_regl, data_regh, addr_regl, addr_regh, 1202 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc);
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/dports/emulators/qemu60/qemu-6.0.0/tcg/riscv/ |
H A D | tcg-target.c.inc | 1104 TCGReg data_regl, data_regh; 1112 data_regl = *args++; 1121 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); 1124 data_regl, data_regh, addr_regl, addr_regh, 1137 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); 1175 TCGReg data_regl, data_regh; 1183 data_regl = *args++; 1192 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc); 1195 data_regl, data_regh, addr_regl, addr_regh, 1208 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc);
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/tcg/mips/ |
H A D | tcg-target.c.inc | 1436 TCGReg data_regl, data_regh; 1444 data_regl = *args++; 1453 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); 1456 data_regl, data_regh, addr_regl, addr_regh, 1463 if (guest_base == 0 && data_regl != addr_regl) { 1470 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); 1538 TCGReg data_regl, data_regh; 1546 data_regl = *args++; 1555 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc); 1558 data_regl, data_regh, addr_regl, addr_regh, [all …]
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/dports/emulators/qemu/qemu-6.2.0/tcg/mips/ |
H A D | tcg-target.c.inc | 1436 TCGReg data_regl, data_regh; 1444 data_regl = *args++; 1453 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); 1456 data_regl, data_regh, addr_regl, addr_regh, 1463 if (guest_base == 0 && data_regl != addr_regl) { 1470 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); 1538 TCGReg data_regl, data_regh; 1546 data_regl = *args++; 1555 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc); 1558 data_regl, data_regh, addr_regl, addr_regh, [all …]
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/dports/emulators/qemu5/qemu-5.2.0/tcg/mips/ |
H A D | tcg-target.c.inc | 1519 TCGReg data_regl, data_regh; 1527 data_regl = *args++; 1536 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); 1539 data_regl, data_regh, addr_regl, addr_regh, 1546 if (guest_base == 0 && data_regl != addr_regl) { 1553 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); 1622 TCGReg data_regl, data_regh; 1630 data_regl = *args++; 1639 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc); 1642 data_regl, data_regh, addr_regl, addr_regh, [all …]
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/dports/emulators/qemu60/qemu-6.0.0/tcg/mips/ |
H A D | tcg-target.c.inc | 1468 TCGReg data_regl, data_regh; 1476 data_regl = *args++; 1485 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); 1488 data_regl, data_regh, addr_regl, addr_regh, 1495 if (guest_base == 0 && data_regl != addr_regl) { 1502 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); 1571 TCGReg data_regl, data_regh; 1579 data_regl = *args++; 1588 tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc); 1591 data_regl, data_regh, addr_regl, addr_regh, [all …]
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