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Searched refs:ddrctrl (Results 1 – 25 of 63) sorted by relevance

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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
99 writel(0x00000000, &ddrctrl->ddrioctrl); in config_ddr()
102 writel(0x80000000, &ddrctrl->ddrioctrl); in config_ddr()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
99 writel(0x00000000, &ddrctrl->ddrioctrl); in config_ddr()
102 writel(0x80000000, &ddrctrl->ddrioctrl); in config_ddr()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
99 writel(0x00000000, &ddrctrl->ddrioctrl); in config_ddr()
102 writel(0x80000000, &ddrctrl->ddrioctrl); in config_ddr()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
99 writel(0x00000000, &ddrctrl->ddrioctrl); in config_ddr()
102 writel(0x80000000, &ddrctrl->ddrioctrl); in config_ddr()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
99 writel(0x00000000, &ddrctrl->ddrioctrl); in config_ddr()
102 writel(0x80000000, &ddrctrl->ddrioctrl); in config_ddr()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
99 writel(0x00000000, &ddrctrl->ddrioctrl); in config_ddr()
102 writel(0x80000000, &ddrctrl->ddrioctrl); in config_ddr()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
99 writel(0x00000000, &ddrctrl->ddrioctrl); in config_ddr()
102 writel(0x80000000, &ddrctrl->ddrioctrl); in config_ddr()
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
99 writel(0x00000000, &ddrctrl->ddrioctrl); in config_ddr()
102 writel(0x80000000, &ddrctrl->ddrioctrl); in config_ddr()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
99 writel(0x00000000, &ddrctrl->ddrioctrl); in config_ddr()
102 writel(0x80000000, &ddrctrl->ddrioctrl); in config_ddr()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
99 writel(0x00000000, &ddrctrl->ddrioctrl); in config_ddr()
102 writel(0x80000000, &ddrctrl->ddrioctrl); in config_ddr()
/dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
99 writel(0x00000000, &ddrctrl->ddrioctrl); in config_ddr()
102 writel(0x80000000, &ddrctrl->ddrioctrl); in config_ddr()
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
99 writel(0x00000000, &ddrctrl->ddrioctrl); in config_ddr()
102 writel(0x80000000, &ddrctrl->ddrioctrl); in config_ddr()
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
99 writel(0x00000000, &ddrctrl->ddrioctrl); in config_ddr()
102 writel(0x80000000, &ddrctrl->ddrioctrl); in config_ddr()
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
99 writel(0x00000000, &ddrctrl->ddrioctrl); in config_ddr()
102 writel(0x80000000, &ddrctrl->ddrioctrl); in config_ddr()
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
99 writel(0x00000000, &ddrctrl->ddrioctrl); in config_ddr()
102 writel(0x80000000, &ddrctrl->ddrioctrl); in config_ddr()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
99 writel(0x00000000, &ddrctrl->ddrioctrl); in config_ddr()
102 writel(0x80000000, &ddrctrl->ddrioctrl); in config_ddr()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR;
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR;
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl);
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl);
99 writel(0x00000000, &ddrctrl->ddrioctrl);
102 writel(0x80000000, &ddrctrl->ddrioctrl);
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
99 writel(0x00000000, &ddrctrl->ddrioctrl); in config_ddr()
102 writel(0x80000000, &ddrctrl->ddrioctrl); in config_ddr()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
99 writel(0x00000000, &ddrctrl->ddrioctrl); in config_ddr()
102 writel(0x80000000, &ddrctrl->ddrioctrl); in config_ddr()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
99 writel(0x00000000, &ddrctrl->ddrioctrl); in config_ddr()
102 writel(0x80000000, &ddrctrl->ddrioctrl); in config_ddr()
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
99 writel(0x00000000, &ddrctrl->ddrioctrl); in config_ddr()
102 writel(0x80000000, &ddrctrl->ddrioctrl); in config_ddr()
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
99 writel(0x00000000, &ddrctrl->ddrioctrl); in config_ddr()
102 writel(0x80000000, &ddrctrl->ddrioctrl); in config_ddr()
/dports/sysutils/u-boot-pcduino3/u-boot-2021.07/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
99 writel(0x00000000, &ddrctrl->ddrioctrl); in config_ddr()
102 writel(0x80000000, &ddrctrl->ddrioctrl); in config_ddr()
/dports/sysutils/u-boot-pine-h64/u-boot-2021.07/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR;
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR;
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl);
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl);
99 writel(0x00000000, &ddrctrl->ddrioctrl);
102 writel(0x80000000, &ddrctrl->ddrioctrl);
/dports/sysutils/u-boot-pine64/u-boot-2021.07/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; variable
83 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
94 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); in config_ddr()
99 writel(0x00000000, &ddrctrl->ddrioctrl); in config_ddr()
102 writel(0x80000000, &ddrctrl->ddrioctrl); in config_ddr()

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