| /dports/emulators/simh/simh-3.9.0_5/S3/ |
| H A D | s3_pkb.c | 41 extern int32 debug_reg;
164 if (debug_reg & 0x80) in pkb()
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 433 ddr->debug_reg = 0x201c0000; /* CL=2 */ in spd_sdram()
435 ddr->debug_reg = 0x202c0000; /* CL=2.5 */ in spd_sdram()
437 ddr->debug_reg = 0x202c0000; /* CL=3.0 */ in spd_sdram()
441 debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); in spd_sdram()
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 432 ddr->debug_reg = 0x201c0000; /* CL=2 */ in spd_sdram()
434 ddr->debug_reg = 0x202c0000; /* CL=2.5 */ in spd_sdram()
436 ddr->debug_reg = 0x202c0000; /* CL=3.0 */ in spd_sdram()
440 debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); in spd_sdram()
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 432 ddr->debug_reg = 0x201c0000; /* CL=2 */ in spd_sdram()
434 ddr->debug_reg = 0x202c0000; /* CL=2.5 */ in spd_sdram()
436 ddr->debug_reg = 0x202c0000; /* CL=3.0 */ in spd_sdram()
440 debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); in spd_sdram()
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 433 ddr->debug_reg = 0x201c0000; /* CL=2 */ in spd_sdram()
435 ddr->debug_reg = 0x202c0000; /* CL=2.5 */ in spd_sdram()
437 ddr->debug_reg = 0x202c0000; /* CL=3.0 */ in spd_sdram()
441 debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); in spd_sdram()
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 440 ddr->debug_reg = 0x201c0000; /* CL=2 */ in spd_sdram()
442 ddr->debug_reg = 0x202c0000; /* CL=2.5 */ in spd_sdram()
444 ddr->debug_reg = 0x202c0000; /* CL=3.0 */ in spd_sdram()
448 debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); in spd_sdram()
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 440 ddr->debug_reg = 0x201c0000; /* CL=2 */ in spd_sdram()
442 ddr->debug_reg = 0x202c0000; /* CL=2.5 */ in spd_sdram()
444 ddr->debug_reg = 0x202c0000; /* CL=3.0 */ in spd_sdram()
448 debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); in spd_sdram()
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 440 ddr->debug_reg = 0x201c0000; /* CL=2 */ in spd_sdram()
442 ddr->debug_reg = 0x202c0000; /* CL=2.5 */ in spd_sdram()
444 ddr->debug_reg = 0x202c0000; /* CL=3.0 */ in spd_sdram()
448 debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); in spd_sdram()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 432 ddr->debug_reg = 0x201c0000; /* CL=2 */ in spd_sdram()
434 ddr->debug_reg = 0x202c0000; /* CL=2.5 */ in spd_sdram()
436 ddr->debug_reg = 0x202c0000; /* CL=3.0 */ in spd_sdram()
440 debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); in spd_sdram()
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 432 ddr->debug_reg = 0x201c0000; /* CL=2 */ in spd_sdram()
434 ddr->debug_reg = 0x202c0000; /* CL=2.5 */ in spd_sdram()
436 ddr->debug_reg = 0x202c0000; /* CL=3.0 */ in spd_sdram()
440 debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); in spd_sdram()
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 440 ddr->debug_reg = 0x201c0000; /* CL=2 */ in spd_sdram()
442 ddr->debug_reg = 0x202c0000; /* CL=2.5 */ in spd_sdram()
444 ddr->debug_reg = 0x202c0000; /* CL=3.0 */ in spd_sdram()
448 debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); in spd_sdram()
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 440 ddr->debug_reg = 0x201c0000; /* CL=2 */ in spd_sdram()
442 ddr->debug_reg = 0x202c0000; /* CL=2.5 */ in spd_sdram()
444 ddr->debug_reg = 0x202c0000; /* CL=3.0 */ in spd_sdram()
448 debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); in spd_sdram()
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 440 ddr->debug_reg = 0x201c0000; /* CL=2 */ in spd_sdram()
442 ddr->debug_reg = 0x202c0000; /* CL=2.5 */ in spd_sdram()
444 ddr->debug_reg = 0x202c0000; /* CL=3.0 */ in spd_sdram()
448 debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); in spd_sdram()
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 440 ddr->debug_reg = 0x201c0000; /* CL=2 */ in spd_sdram()
442 ddr->debug_reg = 0x202c0000; /* CL=2.5 */ in spd_sdram()
444 ddr->debug_reg = 0x202c0000; /* CL=3.0 */ in spd_sdram()
448 debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); in spd_sdram()
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 440 ddr->debug_reg = 0x201c0000; /* CL=2 */ in spd_sdram()
442 ddr->debug_reg = 0x202c0000; /* CL=2.5 */ in spd_sdram()
444 ddr->debug_reg = 0x202c0000; /* CL=3.0 */ in spd_sdram()
448 debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); in spd_sdram()
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 440 ddr->debug_reg = 0x201c0000; /* CL=2 */ in spd_sdram()
442 ddr->debug_reg = 0x202c0000; /* CL=2.5 */ in spd_sdram()
444 ddr->debug_reg = 0x202c0000; /* CL=3.0 */ in spd_sdram()
448 debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); in spd_sdram()
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 432 ddr->debug_reg = 0x201c0000; /* CL=2 */ in spd_sdram()
434 ddr->debug_reg = 0x202c0000; /* CL=2.5 */ in spd_sdram()
436 ddr->debug_reg = 0x202c0000; /* CL=3.0 */ in spd_sdram()
440 debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); in spd_sdram()
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 440 ddr->debug_reg = 0x201c0000; /* CL=2 */ in spd_sdram()
442 ddr->debug_reg = 0x202c0000; /* CL=2.5 */ in spd_sdram()
444 ddr->debug_reg = 0x202c0000; /* CL=3.0 */ in spd_sdram()
448 debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); in spd_sdram()
|
| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 440 ddr->debug_reg = 0x201c0000; /* CL=2 */ in spd_sdram()
442 ddr->debug_reg = 0x202c0000; /* CL=2.5 */ in spd_sdram()
444 ddr->debug_reg = 0x202c0000; /* CL=3.0 */ in spd_sdram()
448 debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); in spd_sdram()
|
| /dports/sysutils/u-boot-chip/u-boot-2021.07/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 440 ddr->debug_reg = 0x201c0000; /* CL=2 */ in spd_sdram()
442 ddr->debug_reg = 0x202c0000; /* CL=2.5 */ in spd_sdram()
444 ddr->debug_reg = 0x202c0000; /* CL=3.0 */ in spd_sdram()
448 debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); in spd_sdram()
|
| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 440 ddr->debug_reg = 0x201c0000; /* CL=2 */ in spd_sdram()
442 ddr->debug_reg = 0x202c0000; /* CL=2.5 */ in spd_sdram()
444 ddr->debug_reg = 0x202c0000; /* CL=3.0 */ in spd_sdram()
448 debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); in spd_sdram()
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 433 ddr->debug_reg = 0x201c0000; /* CL=2 */ in spd_sdram()
435 ddr->debug_reg = 0x202c0000; /* CL=2.5 */ in spd_sdram()
437 ddr->debug_reg = 0x202c0000; /* CL=3.0 */ in spd_sdram()
441 debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); in spd_sdram()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 433 ddr->debug_reg = 0x201c0000; /* CL=2 */ in spd_sdram()
435 ddr->debug_reg = 0x202c0000; /* CL=2.5 */ in spd_sdram()
437 ddr->debug_reg = 0x202c0000; /* CL=3.0 */ in spd_sdram()
441 debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); in spd_sdram()
|
| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 440 ddr->debug_reg = 0x201c0000; /* CL=2 */ in spd_sdram()
442 ddr->debug_reg = 0x202c0000; /* CL=2.5 */ in spd_sdram()
444 ddr->debug_reg = 0x202c0000; /* CL=3.0 */ in spd_sdram()
448 debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); in spd_sdram()
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 440 ddr->debug_reg = 0x201c0000; /* CL=2 */ in spd_sdram()
442 ddr->debug_reg = 0x202c0000; /* CL=2.5 */ in spd_sdram()
444 ddr->debug_reg = 0x202c0000; /* CL=3.0 */ in spd_sdram()
448 debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); in spd_sdram()
|