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/dports/devel/hs-haskell-language-server/haskell-language-server-1.4.0/_cabal_deps/ghc-exactprint-0.6.4/tests/examples/ghc710/
H A DStream.hs140 div2 (2:xs) = 1:div2 xs function
141 div2 ((-2):xs) = (-1):div2 xs function
142 div2 (0:xs) = 0:div2 xs function
143 div2 (1:(-2):xs) = div2 (0:0:xs) function
144 div2 (1:(-1):xs) = div2 (0:1:xs) function
145 div2 (1:0:xs) = div2 (0:2:xs) function
146 div2 (1:1:xs) = div2 (2:(-1):xs) function
147 div2 (1:2:xs) = div2 (2:0:xs) function
148 div2 ((-1):(-2):xs) = div2 ((-2):0:xs) function
149 div2 ((-1):(-1):xs) = div2 ((-2):1:xs) function
[all …]
/dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/third_party/blink/renderer/core/dom/
H A Dtree_scope_adopter_test.cc29 html2->AppendChild(div2); in TEST()
32 EXPECT_EQ(div2->ownerDocument(), doc2); in TEST()
37 TreeScopeAdopter adopter2(*div2, *doc1); in TEST()
42 EXPECT_EQ(div2->ownerDocument(), doc1); in TEST()
63 html2->AppendChild(div2); in TEST()
67 EXPECT_EQ(div2->ownerDocument(), doc2); in TEST()
69 TreeScopeAdopter adopter(*div2, *doc1); in TEST()
74 EXPECT_EQ(div2->ownerDocument(), doc1); in TEST()
99 html2->AppendChild(div2); in TEST()
100 div2->CreateV0ShadowRootForTesting(); in TEST()
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/blink/renderer/core/dom/
H A Dtree_scope_adopter_test.cc29 html2->AppendChild(div2); in TEST()
32 EXPECT_EQ(div2->ownerDocument(), doc2); in TEST()
37 TreeScopeAdopter adopter2(*div2, *doc1); in TEST()
42 EXPECT_EQ(div2->ownerDocument(), doc1); in TEST()
63 html2->AppendChild(div2); in TEST()
67 EXPECT_EQ(div2->ownerDocument(), doc2); in TEST()
69 TreeScopeAdopter adopter(*div2, *doc1); in TEST()
74 EXPECT_EQ(div2->ownerDocument(), doc1); in TEST()
99 html2->AppendChild(div2); in TEST()
100 div2->CreateV0ShadowRootForTesting(); in TEST()
[all …]
/dports/lang/chibi-scheme/chibi-scheme-0.10/benchmarks/gabriel/
H A Ddiv.sch22 (define (iterative-div2 l)
27 (define (recursive-div2 l)
29 (else (cons (car l) (recursive-div2 (cddr l))))))
34 (iterative-div2 l)
35 (iterative-div2 l)
36 (iterative-div2 l)
37 (iterative-div2 l)))
42 (recursive-div2 l)
43 (recursive-div2 l)
44 (recursive-div2 l)
[all …]
/dports/devel/avr-gdb/gdb-7.3.1/sim/testsuite/sim/fr30/
H A Ddiv2.cgs9 .global div2
10 div2:
11 ; Test div2 $Ri
18 div2 r2
29 div2 r2
40 div2 r2
50 div2 r2
62 div2 r2
74 div2 r2
86 div2 r2
[all …]
/dports/devel/gdb761/gdb-7.6.1/sim/testsuite/sim/fr30/
H A Ddiv2.cgs9 .global div2
10 div2:
11 ; Test div2 $Ri
18 div2 r2
29 div2 r2
40 div2 r2
50 div2 r2
62 div2 r2
74 div2 r2
86 div2 r2
[all …]
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/testsuite/sim/fr30/
H A Ddiv2.cgs9 .global div2
10 div2:
11 ; Test div2 $Ri
18 div2 r2
29 div2 r2
40 div2 r2
50 div2 r2
62 div2 r2
74 div2 r2
86 div2 r2
[all …]
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/testsuite/sim/fr30/
H A Ddiv2.cgs9 .global div2
10 div2:
11 ; Test div2 $Ri
18 div2 r2
29 div2 r2
40 div2 r2
50 div2 r2
62 div2 r2
74 div2 r2
86 div2 r2
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/
H A Domod.ll15 %div2 = fmul float %add, 0.5
31 %div2 = fmul double %add, 0.5
47 %div2 = fmul float %add, 0.5
63 %div2 = fmul double %add, 0.5
74 %div2 = fmul float %add, 0.5
94 %div2 = fmul float %add, 0.5
112 %div2 = fmul float %add, 2.0
130 %div2 = fmul float %add, 4.0
149 %div2 = fmul float %add, 4.0
160 %div2 = fmul float %add, 4.0
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Domod.ll15 %div2 = fmul float %add, 0.5
31 %div2 = fmul double %add, 0.5
47 %div2 = fmul float %add, 0.5
63 %div2 = fmul double %add, 0.5
74 %div2 = fmul float %add, 0.5
94 %div2 = fmul float %add, 0.5
112 %div2 = fmul float %add, 2.0
130 %div2 = fmul float %add, 4.0
149 %div2 = fmul float %add, 4.0
160 %div2 = fmul float %add, 4.0
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/
H A Domod.ll15 %div2 = fmul float %add, 0.5
31 %div2 = fmul double %add, 0.5
47 %div2 = fmul float %add, 0.5
63 %div2 = fmul double %add, 0.5
74 %div2 = fmul float %add, 0.5
94 %div2 = fmul float %add, 0.5
112 %div2 = fmul float %add, 2.0
130 %div2 = fmul float %add, 4.0
149 %div2 = fmul float %add, 4.0
160 %div2 = fmul float %add, 4.0
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Domod.ll15 %div2 = fmul float %add, 0.5
31 %div2 = fmul double %add, 0.5
47 %div2 = fmul float %add, 0.5
63 %div2 = fmul double %add, 0.5
74 %div2 = fmul float %add, 0.5
94 %div2 = fmul float %add, 0.5
112 %div2 = fmul float %add, 2.0
130 %div2 = fmul float %add, 4.0
149 %div2 = fmul float %add, 4.0
160 %div2 = fmul float %add, 4.0
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Domod.ll15 %div2 = fmul float %add, 0.5
31 %div2 = fmul double %add, 0.5
47 %div2 = fmul float %add, 0.5
63 %div2 = fmul double %add, 0.5
74 %div2 = fmul float %add, 0.5
94 %div2 = fmul float %add, 0.5
112 %div2 = fmul float %add, 2.0
130 %div2 = fmul float %add, 4.0
149 %div2 = fmul float %add, 4.0
160 %div2 = fmul float %add, 4.0
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/clk/
H A Dclk-vt8500.c456 int div1, div2; in wm8750_find_pll_bits() local
463 for (div2 = 7; div2 >= 0; div2--) in wm8750_find_pll_bits()
474 *divisor2 = div2; in wm8750_find_pll_bits()
482 *divisor2 = div2; in wm8750_find_pll_bits()
504 int div1, div2; in wm8850_find_pll_bits() local
511 for (div2 = 3; div2 >= 0; div2--) in wm8850_find_pll_bits()
514 ((div1 + 1) * (1 << div2)); in wm8850_find_pll_bits()
522 *divisor2 = div2; in wm8850_find_pll_bits()
530 *divisor2 = div2; in wm8850_find_pll_bits()
550 u32 filter, mul, div1, div2; in vtwm_pll_set_rate() local
[all …]
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/clk/
H A Dclk-vt8500.c456 int div1, div2; in wm8750_find_pll_bits() local
463 for (div2 = 7; div2 >= 0; div2--) in wm8750_find_pll_bits()
474 *divisor2 = div2; in wm8750_find_pll_bits()
482 *divisor2 = div2; in wm8750_find_pll_bits()
504 int div1, div2; in wm8850_find_pll_bits() local
511 for (div2 = 3; div2 >= 0; div2--) in wm8850_find_pll_bits()
514 ((div1 + 1) * (1 << div2)); in wm8850_find_pll_bits()
522 *divisor2 = div2; in wm8850_find_pll_bits()
530 *divisor2 = div2; in wm8850_find_pll_bits()
550 u32 filter, mul, div1, div2; in vtwm_pll_set_rate() local
[all …]
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/clk/
H A Dclk-vt8500.c456 int div1, div2; in wm8750_find_pll_bits() local
463 for (div2 = 7; div2 >= 0; div2--) in wm8750_find_pll_bits()
474 *divisor2 = div2; in wm8750_find_pll_bits()
482 *divisor2 = div2; in wm8750_find_pll_bits()
504 int div1, div2; in wm8850_find_pll_bits() local
511 for (div2 = 3; div2 >= 0; div2--) in wm8850_find_pll_bits()
514 ((div1 + 1) * (1 << div2)); in wm8850_find_pll_bits()
522 *divisor2 = div2; in wm8850_find_pll_bits()
530 *divisor2 = div2; in wm8850_find_pll_bits()
550 u32 filter, mul, div1, div2; in vtwm_pll_set_rate() local
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/
H A Domod.ll15 %div2 = fmul float %add, 0.5
31 %div2 = fmul float %add, 0.5
42 %div2 = fmul float %add, 0.5
51 %div2 = fmul float %add, 0.5
60 %div2 = fmul float %add, 2.0
69 %div2 = fmul float %add, 4.0
79 %div2 = fmul float %add, 4.0
90 %div2 = fmul float %add, 4.0
100 %div2 = fmul float %add, 0.5
194 %div2.1 = fmul float %div2.0, 0.5
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/
H A Domod.ll15 %div2 = fmul float %add, 0.5
31 %div2 = fmul float %add, 0.5
42 %div2 = fmul float %add, 0.5
51 %div2 = fmul float %add, 0.5
60 %div2 = fmul float %add, 2.0
69 %div2 = fmul float %add, 4.0
79 %div2 = fmul float %add, 4.0
90 %div2 = fmul float %add, 4.0
100 %div2 = fmul float %add, 0.5
194 %div2.1 = fmul float %div2.0, 0.5
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/
H A Domod.ll15 %div2 = fmul float %add, 0.5
31 %div2 = fmul float %add, 0.5
42 %div2 = fmul float %add, 0.5
51 %div2 = fmul float %add, 0.5
60 %div2 = fmul float %add, 2.0
69 %div2 = fmul float %add, 4.0
79 %div2 = fmul float %add, 4.0
90 %div2 = fmul float %add, 4.0
100 %div2 = fmul float %add, 0.5
194 %div2.1 = fmul float %div2.0, 0.5
[all …]
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AMDGPU/
H A Domod.ll15 %div2 = fmul float %add, 0.5
31 %div2 = fmul float %add, 0.5
42 %div2 = fmul float %add, 0.5
51 %div2 = fmul float %add, 0.5
60 %div2 = fmul float %add, 2.0
69 %div2 = fmul float %add, 4.0
79 %div2 = fmul float %add, 4.0
90 %div2 = fmul float %add, 4.0
100 %div2 = fmul float %add, 0.5
194 %div2.1 = fmul float %div2.0, 0.5
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Domod.ll15 %div2 = fmul float %add, 0.5
31 %div2 = fmul float %add, 0.5
42 %div2 = fmul float %add, 0.5
51 %div2 = fmul float %add, 0.5
60 %div2 = fmul float %add, 2.0
69 %div2 = fmul float %add, 4.0
79 %div2 = fmul float %add, 4.0
90 %div2 = fmul float %add, 4.0
100 %div2 = fmul float %add, 0.5
194 %div2.1 = fmul float %div2.0, 0.5
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Domod.ll15 %div2 = fmul float %add, 0.5
31 %div2 = fmul float %add, 0.5
42 %div2 = fmul float %add, 0.5
51 %div2 = fmul float %add, 0.5
60 %div2 = fmul float %add, 2.0
69 %div2 = fmul float %add, 4.0
79 %div2 = fmul float %add, 4.0
90 %div2 = fmul float %add, 4.0
100 %div2 = fmul float %add, 0.5
194 %div2.1 = fmul float %div2.0, 0.5
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AMDGPU/
H A Domod.ll15 %div2 = fmul float %add, 0.5
31 %div2 = fmul float %add, 0.5
42 %div2 = fmul float %add, 0.5
51 %div2 = fmul float %add, 0.5
60 %div2 = fmul float %add, 2.0
69 %div2 = fmul float %add, 4.0
79 %div2 = fmul float %add, 4.0
90 %div2 = fmul float %add, 4.0
100 %div2 = fmul float %add, 0.5
194 %div2.1 = fmul float %div2.0, 0.5
[all …]
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AMDGPU/
H A Domod.ll15 %div2 = fmul float %add, 0.5
31 %div2 = fmul float %add, 0.5
42 %div2 = fmul float %add, 0.5
51 %div2 = fmul float %add, 0.5
60 %div2 = fmul float %add, 2.0
69 %div2 = fmul float %add, 4.0
79 %div2 = fmul float %add, 4.0
90 %div2 = fmul float %add, 4.0
100 %div2 = fmul float %add, 0.5
194 %div2.1 = fmul float %div2.0, 0.5
[all …]
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AMDGPU/
H A Domod.ll15 %div2 = fmul float %add, 0.5
31 %div2 = fmul float %add, 0.5
42 %div2 = fmul float %add, 0.5
51 %div2 = fmul float %add, 0.5
60 %div2 = fmul float %add, 2.0
69 %div2 = fmul float %add, 4.0
79 %div2 = fmul float %add, 4.0
90 %div2 = fmul float %add, 4.0
100 %div2 = fmul float %add, 0.5
194 %div2.1 = fmul float %div2.0, 0.5
[all …]

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