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/dports/lang/clover/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_cp_dma.c56 static void si_emit_cp_dma(struct si_context *sctx, struct radeon_cmdbuf *cs, uint64_t dst_va, in si_emit_cp_dma() argument
78 if (sctx->chip_class >= GFX9 && !(flags & CP_DMA_CLEAR) && src_va == dst_va) { in si_emit_cp_dma()
107 radeon_emit(dst_va); /* DST_ADDR_LO [31:0] */ in si_emit_cp_dma()
108 radeon_emit(dst_va >> 32); /* DST_ADDR_HI [31:0] */ in si_emit_cp_dma()
116 radeon_emit(dst_va); /* DST_ADDR_LO [31:0] */ in si_emit_cp_dma()
117 radeon_emit((dst_va >> 32) & 0xffff); /* DST_ADDR_HI [15:0] */ in si_emit_cp_dma()
514 uint64_t dst_va = (dst ? dst->gpu_address : 0ull) + dst_offset; in si_cp_copy_data() local
522 radeon_emit(dst_va); in si_cp_copy_data()
523 radeon_emit(dst_va >> 32); in si_cp_copy_data()
/dports/graphics/libosmesa/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_cp_dma.c56 static void si_emit_cp_dma(struct si_context *sctx, struct radeon_cmdbuf *cs, uint64_t dst_va, in si_emit_cp_dma() argument
78 if (sctx->chip_class >= GFX9 && !(flags & CP_DMA_CLEAR) && src_va == dst_va) { in si_emit_cp_dma()
107 radeon_emit(dst_va); /* DST_ADDR_LO [31:0] */ in si_emit_cp_dma()
108 radeon_emit(dst_va >> 32); /* DST_ADDR_HI [31:0] */ in si_emit_cp_dma()
116 radeon_emit(dst_va); /* DST_ADDR_LO [31:0] */ in si_emit_cp_dma()
117 radeon_emit((dst_va >> 32) & 0xffff); /* DST_ADDR_HI [15:0] */ in si_emit_cp_dma()
514 uint64_t dst_va = (dst ? dst->gpu_address : 0ull) + dst_offset; in si_cp_copy_data() local
522 radeon_emit(dst_va); in si_cp_copy_data()
523 radeon_emit(dst_va >> 32); in si_cp_copy_data()
/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_cp_dma.c56 static void si_emit_cp_dma(struct si_context *sctx, struct radeon_cmdbuf *cs, uint64_t dst_va, in si_emit_cp_dma() argument
78 if (sctx->chip_class >= GFX9 && !(flags & CP_DMA_CLEAR) && src_va == dst_va) { in si_emit_cp_dma()
107 radeon_emit(dst_va); /* DST_ADDR_LO [31:0] */ in si_emit_cp_dma()
108 radeon_emit(dst_va >> 32); /* DST_ADDR_HI [31:0] */ in si_emit_cp_dma()
116 radeon_emit(dst_va); /* DST_ADDR_LO [31:0] */ in si_emit_cp_dma()
117 radeon_emit((dst_va >> 32) & 0xffff); /* DST_ADDR_HI [15:0] */ in si_emit_cp_dma()
514 uint64_t dst_va = (dst ? dst->gpu_address : 0ull) + dst_offset; in si_cp_copy_data() local
522 radeon_emit(dst_va); in si_cp_copy_data()
523 radeon_emit(dst_va >> 32); in si_cp_copy_data()
/dports/graphics/mesa-libs/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_cp_dma.c56 static void si_emit_cp_dma(struct si_context *sctx, struct radeon_cmdbuf *cs, uint64_t dst_va, in si_emit_cp_dma() argument
78 if (sctx->chip_class >= GFX9 && !(flags & CP_DMA_CLEAR) && src_va == dst_va) { in si_emit_cp_dma()
107 radeon_emit(dst_va); /* DST_ADDR_LO [31:0] */ in si_emit_cp_dma()
108 radeon_emit(dst_va >> 32); /* DST_ADDR_HI [31:0] */ in si_emit_cp_dma()
116 radeon_emit(dst_va); /* DST_ADDR_LO [31:0] */ in si_emit_cp_dma()
117 radeon_emit((dst_va >> 32) & 0xffff); /* DST_ADDR_HI [15:0] */ in si_emit_cp_dma()
514 uint64_t dst_va = (dst ? dst->gpu_address : 0ull) + dst_offset; in si_cp_copy_data() local
522 radeon_emit(dst_va); in si_cp_copy_data()
523 radeon_emit(dst_va >> 32); in si_cp_copy_data()
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_cp_dma.c56 static void si_emit_cp_dma(struct si_context *sctx, struct radeon_cmdbuf *cs, uint64_t dst_va, in si_emit_cp_dma() argument
78 if (sctx->chip_class >= GFX9 && !(flags & CP_DMA_CLEAR) && src_va == dst_va) { in si_emit_cp_dma()
107 radeon_emit(dst_va); /* DST_ADDR_LO [31:0] */ in si_emit_cp_dma()
108 radeon_emit(dst_va >> 32); /* DST_ADDR_HI [31:0] */ in si_emit_cp_dma()
116 radeon_emit(dst_va); /* DST_ADDR_LO [31:0] */ in si_emit_cp_dma()
117 radeon_emit((dst_va >> 32) & 0xffff); /* DST_ADDR_HI [15:0] */ in si_emit_cp_dma()
514 uint64_t dst_va = (dst ? dst->gpu_address : 0ull) + dst_offset; in si_cp_copy_data() local
522 radeon_emit(dst_va); in si_cp_copy_data()
523 radeon_emit(dst_va >> 32); in si_cp_copy_data()
/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_cp_dma.c56 static void si_emit_cp_dma(struct si_context *sctx, struct radeon_cmdbuf *cs, uint64_t dst_va, in si_emit_cp_dma() argument
78 if (sctx->chip_class >= GFX9 && !(flags & CP_DMA_CLEAR) && src_va == dst_va) { in si_emit_cp_dma()
107 radeon_emit(dst_va); /* DST_ADDR_LO [31:0] */ in si_emit_cp_dma()
108 radeon_emit(dst_va >> 32); /* DST_ADDR_HI [31:0] */ in si_emit_cp_dma()
116 radeon_emit(dst_va); /* DST_ADDR_LO [31:0] */ in si_emit_cp_dma()
117 radeon_emit((dst_va >> 32) & 0xffff); /* DST_ADDR_HI [15:0] */ in si_emit_cp_dma()
514 uint64_t dst_va = (dst ? dst->gpu_address : 0ull) + dst_offset; in si_cp_copy_data() local
522 radeon_emit(dst_va); in si_cp_copy_data()
523 radeon_emit(dst_va >> 32); in si_cp_copy_data()
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_cp_dma.c56 static void si_emit_cp_dma(struct si_context *sctx, struct radeon_cmdbuf *cs, uint64_t dst_va, in si_emit_cp_dma() argument
78 if (sctx->chip_class >= GFX9 && !(flags & CP_DMA_CLEAR) && src_va == dst_va) { in si_emit_cp_dma()
107 radeon_emit(dst_va); /* DST_ADDR_LO [31:0] */ in si_emit_cp_dma()
108 radeon_emit(dst_va >> 32); /* DST_ADDR_HI [31:0] */ in si_emit_cp_dma()
116 radeon_emit(dst_va); /* DST_ADDR_LO [31:0] */ in si_emit_cp_dma()
117 radeon_emit((dst_va >> 32) & 0xffff); /* DST_ADDR_HI [15:0] */ in si_emit_cp_dma()
514 uint64_t dst_va = (dst ? dst->gpu_address : 0ull) + dst_offset; in si_cp_copy_data() local
522 radeon_emit(dst_va); in si_cp_copy_data()
523 radeon_emit(dst_va >> 32); in si_cp_copy_data()
/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_cp_dma.c56 static void si_emit_cp_dma(struct si_context *sctx, struct radeon_cmdbuf *cs, uint64_t dst_va, in si_emit_cp_dma() argument
78 if (sctx->chip_class >= GFX9 && !(flags & CP_DMA_CLEAR) && src_va == dst_va) { in si_emit_cp_dma()
107 radeon_emit(dst_va); /* DST_ADDR_LO [31:0] */ in si_emit_cp_dma()
108 radeon_emit(dst_va >> 32); /* DST_ADDR_HI [31:0] */ in si_emit_cp_dma()
116 radeon_emit(dst_va); /* DST_ADDR_LO [31:0] */ in si_emit_cp_dma()
117 radeon_emit((dst_va >> 32) & 0xffff); /* DST_ADDR_HI [15:0] */ in si_emit_cp_dma()
514 uint64_t dst_va = (dst ? dst->gpu_address : 0ull) + dst_offset; in si_cp_copy_data() local
522 radeon_emit(dst_va); in si_cp_copy_data()
523 radeon_emit(dst_va >> 32); in si_cp_copy_data()
/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/gallium/drivers/radeonsi/
H A Dsi_cp_dma.c56 static void si_emit_cp_dma(struct si_context *sctx, struct radeon_cmdbuf *cs, uint64_t dst_va, in si_emit_cp_dma() argument
78 if (sctx->chip_class >= GFX9 && !(flags & CP_DMA_CLEAR) && src_va == dst_va) { in si_emit_cp_dma()
107 radeon_emit(dst_va); /* DST_ADDR_LO [31:0] */ in si_emit_cp_dma()
108 radeon_emit(dst_va >> 32); /* DST_ADDR_HI [31:0] */ in si_emit_cp_dma()
116 radeon_emit(dst_va); /* DST_ADDR_LO [31:0] */ in si_emit_cp_dma()
117 radeon_emit((dst_va >> 32) & 0xffff); /* DST_ADDR_HI [15:0] */ in si_emit_cp_dma()
520 uint64_t dst_va = (dst ? dst->gpu_address : 0ull) + dst_offset; in si_cp_copy_data() local
528 radeon_emit(dst_va); in si_cp_copy_data()
529 radeon_emit(dst_va >> 32); in si_cp_copy_data()
/dports/graphics/mesa-dri/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_cp_dma.c56 static void si_emit_cp_dma(struct si_context *sctx, struct radeon_cmdbuf *cs, uint64_t dst_va, in si_emit_cp_dma() argument
78 if (sctx->chip_class >= GFX9 && !(flags & CP_DMA_CLEAR) && src_va == dst_va) { in si_emit_cp_dma()
107 radeon_emit(dst_va); /* DST_ADDR_LO [31:0] */ in si_emit_cp_dma()
108 radeon_emit(dst_va >> 32); /* DST_ADDR_HI [31:0] */ in si_emit_cp_dma()
116 radeon_emit(dst_va); /* DST_ADDR_LO [31:0] */ in si_emit_cp_dma()
117 radeon_emit((dst_va >> 32) & 0xffff); /* DST_ADDR_HI [15:0] */ in si_emit_cp_dma()
514 uint64_t dst_va = (dst ? dst->gpu_address : 0ull) + dst_offset; in si_cp_copy_data() local
522 radeon_emit(dst_va); in si_cp_copy_data()
523 radeon_emit(dst_va >> 32); in si_cp_copy_data()
/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/gallium/drivers/radeonsi/
H A Dsi_cp_dma.c55 static void si_emit_cp_dma(struct si_context *sctx, struct radeon_cmdbuf *cs, uint64_t dst_va, in si_emit_cp_dma() argument
83 if (sctx->chip_class >= GFX9 && !(flags & CP_DMA_CLEAR) && src_va == dst_va) { in si_emit_cp_dma()
110 radeon_emit(cs, dst_va); /* DST_ADDR_LO [31:0] */ in si_emit_cp_dma()
111 radeon_emit(cs, dst_va >> 32); /* DST_ADDR_HI [31:0] */ in si_emit_cp_dma()
119 radeon_emit(cs, dst_va); /* DST_ADDR_LO [31:0] */ in si_emit_cp_dma()
120 radeon_emit(cs, (dst_va >> 32) & 0xffff); /* DST_ADDR_HI [15:0] */ in si_emit_cp_dma()
606 uint64_t dst_va = (dst ? dst->gpu_address : 0ull) + dst_offset; in si_cp_copy_data() local
613 radeon_emit(cs, dst_va); in si_cp_copy_data()
614 radeon_emit(cs, dst_va >> 32); in si_cp_copy_data()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/misc/sgi-xp/
H A Dxp_uv.c50 unsigned long *dst_va = __va(uv_gpa_to_soc_phys_ram(dst_gpa)); in xp_remote_mmr_read() local
55 ret = gru_read_gpa(dst_va, src_gpa); in xp_remote_mmr_read()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/misc/sgi-xp/
H A Dxp_uv.c50 unsigned long *dst_va = __va(uv_gpa_to_soc_phys_ram(dst_gpa)); in xp_remote_mmr_read() local
55 ret = gru_read_gpa(dst_va, src_gpa); in xp_remote_mmr_read()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/misc/sgi-xp/
H A Dxp_uv.c50 unsigned long *dst_va = __va(uv_gpa_to_soc_phys_ram(dst_gpa)); in xp_remote_mmr_read() local
55 ret = gru_read_gpa(dst_va, src_gpa); in xp_remote_mmr_read()
/dports/misc/rump/buildrump.sh-b914579/src/sys/arch/mips/mips/
H A Dpmap_machdep.c598 const register_t dst_va = pmap_md_map_ephemeral_page(dst_pg, false, in pmap_zero_page() local
601 mips_pagezero(dst_va); in pmap_zero_page()
603 pmap_md_unmap_ephemeral_page(dst_pg, false, dst_va, dst_pte); in pmap_zero_page()
627 const register_t dst_va = pmap_md_map_ephemeral_page(dst_pg, false, in pmap_copy_page() local
630 mips_pagecopy(dst_va, src_va); in pmap_copy_page()
632 pmap_md_unmap_ephemeral_page(dst_pg, false, dst_va, dst_pte); in pmap_copy_page()
/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/freedreno/vulkan/
H A Dtu_clear_blit.c1260 if ((dst_va & 63) || (pitch & 63)) { in tu_copy_image_to_buffer()
1263 ops->dst_buffer(cs, dst_format, dst_va & ~63, 0); in tu_copy_image_to_buffer()
1267 dst_va += pitch; in tu_copy_image_to_buffer()
1270 ops->dst_buffer(cs, dst_format, dst_va, pitch); in tu_copy_image_to_buffer()
1524 uint64_t dst_va, in copy_buffer() argument
1538 uint32_t dst_x = (dst_va & 63) / block_size; in copy_buffer()
1542 ops->dst_buffer( cs, format, dst_va & ~63, 0); in copy_buffer()
1547 dst_va += width * block_size; in copy_buffer()
1616 uint64_t dst_va = tu_buffer_iova(buffer) + dstOffset; in tu_CmdFillBuffer() local
1623 uint32_t dst_x = (dst_va & 63) / 4; in tu_CmdFillBuffer()
[all …]
/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/amd/vulkan/
H A Dradv_meta_buffer.c343 uint64_t dst_va = radv_buffer_get_va(dst_bo); in radv_copy_buffer() local
345 dst_va += dst_offset; in radv_copy_buffer()
350 si_cp_dma_buffer_copy(cmd_buffer, src_va, dst_va, size); in radv_copy_buffer()
/dports/lang/clover/mesa-21.3.6/src/amd/vulkan/
H A Dradv_meta_buffer.c348 uint64_t dst_va = radv_buffer_get_va(dst_bo); in radv_copy_buffer() local
350 dst_va += dst_offset; in radv_copy_buffer()
355 si_cp_dma_buffer_copy(cmd_buffer, src_va, dst_va, size); in radv_copy_buffer()
/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/amd/vulkan/
H A Dradv_meta_buffer.c348 uint64_t dst_va = radv_buffer_get_va(dst_bo); in radv_copy_buffer() local
350 dst_va += dst_offset; in radv_copy_buffer()
355 si_cp_dma_buffer_copy(cmd_buffer, src_va, dst_va, size); in radv_copy_buffer()
/dports/graphics/libosmesa/mesa-21.3.6/src/amd/vulkan/
H A Dradv_meta_buffer.c348 uint64_t dst_va = radv_buffer_get_va(dst_bo); in radv_copy_buffer() local
350 dst_va += dst_offset; in radv_copy_buffer()
355 si_cp_dma_buffer_copy(cmd_buffer, src_va, dst_va, size); in radv_copy_buffer()
/dports/graphics/mesa-libs/mesa-21.3.6/src/amd/vulkan/
H A Dradv_meta_buffer.c348 uint64_t dst_va = radv_buffer_get_va(dst_bo); in radv_copy_buffer() local
350 dst_va += dst_offset; in radv_copy_buffer()
355 si_cp_dma_buffer_copy(cmd_buffer, src_va, dst_va, size); in radv_copy_buffer()
/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/amd/vulkan/
H A Dradv_meta_buffer.c348 uint64_t dst_va = radv_buffer_get_va(dst_bo); in radv_copy_buffer() local
350 dst_va += dst_offset; in radv_copy_buffer()
355 si_cp_dma_buffer_copy(cmd_buffer, src_va, dst_va, size); in radv_copy_buffer()
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/amd/vulkan/
H A Dradv_meta_buffer.c348 uint64_t dst_va = radv_buffer_get_va(dst_bo); in radv_copy_buffer() local
350 dst_va += dst_offset; in radv_copy_buffer()
355 si_cp_dma_buffer_copy(cmd_buffer, src_va, dst_va, size); in radv_copy_buffer()
/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/amd/vulkan/
H A Dradv_meta_buffer.c348 uint64_t dst_va = radv_buffer_get_va(dst_bo); in radv_copy_buffer() local
350 dst_va += dst_offset; in radv_copy_buffer()
355 si_cp_dma_buffer_copy(cmd_buffer, src_va, dst_va, size); in radv_copy_buffer()
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/amd/vulkan/
H A Dradv_meta_buffer.c348 uint64_t dst_va = radv_buffer_get_va(dst_bo); in radv_copy_buffer() local
350 dst_va += dst_offset; in radv_copy_buffer()
355 si_cp_dma_buffer_copy(cmd_buffer, src_va, dst_va, size); in radv_copy_buffer()

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