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Searched refs:emif_ddr_ext_phy_ctrl_1 (Results 1 – 25 of 514) sorted by relevance

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/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/arm/cpu/armv7/omap5/
H A Dsdram.c47 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
66 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
85 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
105 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
129 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
154 .emif_ddr_ext_phy_ctrl_1 = 0x10040100,
179 .emif_ddr_ext_phy_ctrl_1 = 0x10040100,
204 .emif_ddr_ext_phy_ctrl_1 = 0x10040100,
611 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
612 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
[all …]
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-omap2/omap5/
H A Dsdram.c46 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
65 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
84 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
104 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
128 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
515 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
516 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
554 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dsdram.c47 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
66 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
85 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
105 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
129 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
516 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
517 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
555 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dsdram.c47 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
66 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
85 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
105 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
129 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
516 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
517 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
555 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dsdram.c47 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
66 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
85 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
105 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
129 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
516 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
517 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
555 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dsdram.c47 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
66 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
85 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
105 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
129 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
516 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
517 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
555 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dsdram.c47 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
66 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
85 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
105 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
129 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
516 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
517 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
555 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dsdram.c47 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
66 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
85 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
105 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
129 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
516 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
517 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
555 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dsdram.c47 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
66 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
85 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
105 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
129 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
516 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
517 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
555 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dsdram.c47 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
66 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
85 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
105 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
129 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
516 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
517 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
555 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dsdram.c47 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
66 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
85 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
105 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
129 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
516 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
517 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
555 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dsdram.c47 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
66 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
85 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
105 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
129 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
516 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
517 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
555 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dsdram.c47 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
66 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
85 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
105 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
129 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
516 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
517 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
555 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-omap2/omap5/
H A Dsdram.c46 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
65 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
84 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
104 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
128 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
515 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
516 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
554 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dsdram.c47 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
66 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
85 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
105 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
129 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
516 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
517 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
555 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()
/dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dsdram.c47 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
66 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
85 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
105 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
129 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
516 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
517 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
555 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dsdram.c47 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
66 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
85 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
105 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
129 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
516 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
517 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
555 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dsdram.c47 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
66 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
85 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
105 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
129 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
516 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
517 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
555 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dsdram.c47 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
66 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
85 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
105 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
129 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
516 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
517 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
555 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/mach-omap2/omap5/
H A Dsdram.c46 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
65 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
84 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
104 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
128 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
515 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
516 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
554 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/mach-omap2/omap5/
H A Dsdram.c46 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
65 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
84 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
104 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
128 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
515 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
516 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
554 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dsdram.c47 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
66 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
85 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
105 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
129 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
516 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
517 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
555 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dsdram.c47 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
66 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
85 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
105 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
129 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
516 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
517 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
555 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dsdram.c47 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
66 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
85 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
105 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
129 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
516 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
517 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
555 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dsdram.c47 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
66 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
85 .emif_ddr_ext_phy_ctrl_1 = 0x04020080,
105 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
129 .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
516 ext_phy_ctrl_base = (u32 *) &(regs->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
517 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
555 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()

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