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Searched refs:emif_rd_wr_lvl_rmp_ctl (Results 1 – 25 of 452) sorted by relevance

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/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/arm/cpu/armv7/omap5/
H A Dsdram.c111 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
135 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
160 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
185 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
210 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
647 hw_leveling = regs->emif_rd_wr_lvl_rmp_ctl >> EMIF_REG_RDWRLVL_EN_SHIFT; in do_ext_phy_settings_dra7()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/board/ti/dra7xx/
H A Devm.c90 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
115 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
140 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
165 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
190 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
215 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
240 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
265 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/board/ti/dra7xx/
H A Devm.c90 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
115 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
140 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
165 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
190 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
215 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
240 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
265 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/board/ti/dra7xx/
H A Devm.c90 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
115 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
140 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
165 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
190 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
215 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
240 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
265 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/board/ti/dra7xx/
H A Devm.c90 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
115 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
140 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
165 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
190 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
215 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
240 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
265 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/board/ti/dra7xx/
H A Devm.c90 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
115 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
140 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
165 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
190 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
215 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
240 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
265 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/board/ti/dra7xx/
H A Devm.c90 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
115 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
140 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
165 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
190 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
215 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
240 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
265 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/board/ti/dra7xx/
H A Devm.c90 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
115 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
140 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
165 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
190 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
215 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
240 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
265 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/board/ti/dra7xx/
H A Devm.c90 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
115 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
140 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
165 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
190 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
215 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
240 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
265 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/board/ti/dra7xx/
H A Devm.c90 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
115 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
140 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
165 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
190 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
215 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
240 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
265 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/board/ti/dra7xx/
H A Devm.c90 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
115 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
140 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
165 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
190 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
215 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
240 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
265 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/board/ti/dra7xx/
H A Devm.c90 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
115 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
140 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
165 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
190 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
215 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
240 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
265 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
/dports/sysutils/u-boot-sopine/u-boot-2021.07/board/ti/dra7xx/
H A Devm.c90 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
115 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
140 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
165 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
190 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
215 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
240 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
265 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/board/ti/dra7xx/
H A Devm.c90 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
115 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
140 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
165 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
190 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
215 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
240 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
265 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/board/ti/dra7xx/
H A Devm.c90 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
115 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
140 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
165 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
190 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
215 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
240 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
265 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/board/ti/dra7xx/
H A Devm.c90 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
115 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
140 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
165 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
190 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
215 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
240 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
265 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/board/ti/dra7xx/
H A Devm.c90 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
115 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
140 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
165 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
190 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
215 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
240 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
265 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/board/ti/dra7xx/
H A Devm.c90 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
115 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
140 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
165 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
190 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
215 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
240 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
265 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
/dports/sysutils/u-boot-chip/u-boot-2021.07/board/ti/dra7xx/
H A Devm.c90 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
115 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
140 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
165 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
190 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
215 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
240 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
265 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/board/ti/dra7xx/
H A Devm.c90 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
115 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
140 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
165 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
190 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
215 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
240 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
265 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/board/ti/dra7xx/
H A Devm.c90 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
115 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
140 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
165 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
190 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
215 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
240 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
265 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/board/ti/dra7xx/
H A Devm.c90 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
115 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
140 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
165 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
190 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
215 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
240 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
265 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/board/ti/dra7xx/
H A Devm.c90 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
115 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
140 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
165 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
190 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
215 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
240 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
265 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
/dports/sysutils/u-boot-pine-h64/u-boot-2021.07/board/ti/dra7xx/
H A Devm.c90 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
115 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
140 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
165 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
190 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
215 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
240 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
265 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
/dports/sysutils/u-boot-pcduino3/u-boot-2021.07/board/ti/dra7xx/
H A Devm.c90 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
115 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
140 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
165 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
190 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
215 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
240 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
265 .emif_rd_wr_lvl_rmp_ctl = 0x80000000,

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