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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/Analysis/CostModel/AMDGPU/
H A Dfneg.ll5 ; CHECK: estimated cost of 0 for instruction: %fneg = fneg float
9 %fneg = fneg float %fadd
19 %fneg = fneg <2 x float> %fadd
29 %fneg = fneg <3 x float> %fadd
39 %fneg = fneg <5 x float> %fadd
49 %fneg = fneg double %fadd
59 %fneg = fneg <2 x double> %fadd
69 %fneg = fneg <3 x double> %fadd
79 %fneg = fneg half %fadd
89 %fneg = fneg <2 x half> %fadd
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/Analysis/CostModel/AMDGPU/
H A Dfneg.ll5 ; CHECK: estimated cost of 0 for instruction: %fneg = fneg float
9 %fneg = fneg float %fadd
19 %fneg = fneg <2 x float> %fadd
29 %fneg = fneg <3 x float> %fadd
39 %fneg = fneg <5 x float> %fadd
49 %fneg = fneg double %fadd
59 %fneg = fneg <2 x double> %fadd
69 %fneg = fneg <3 x double> %fadd
79 %fneg = fneg half %fadd
89 %fneg = fneg <2 x half> %fadd
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/Analysis/CostModel/AMDGPU/
H A Dfneg.ll5 ; CHECK: estimated cost of 0 for instruction: %fneg = fneg float
9 %fneg = fneg float %fadd
19 %fneg = fneg <2 x float> %fadd
29 %fneg = fneg <3 x float> %fadd
39 %fneg = fneg <5 x float> %fadd
49 %fneg = fneg double %fadd
59 %fneg = fneg <2 x double> %fadd
69 %fneg = fneg <3 x double> %fadd
79 %fneg = fneg half %fadd
89 %fneg = fneg <2 x half> %fadd
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/Analysis/CostModel/AMDGPU/
H A Dfneg.ll5 ; CHECK: estimated cost of 0 for instruction: %fneg = fneg float
9 %fneg = fneg float %fadd
19 %fneg = fneg <2 x float> %fadd
29 %fneg = fneg <3 x float> %fadd
39 %fneg = fneg <5 x float> %fadd
49 %fneg = fneg double %fadd
59 %fneg = fneg <2 x double> %fadd
69 %fneg = fneg <3 x double> %fadd
79 %fneg = fneg half %fadd
89 %fneg = fneg <2 x half> %fadd
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/Analysis/CostModel/AMDGPU/
H A Dfneg.ll5 ; CHECK: estimated cost of 0 for instruction: %fneg = fneg float
9 %fneg = fneg float %fadd
19 %fneg = fneg <2 x float> %fadd
29 %fneg = fneg <3 x float> %fadd
39 %fneg = fneg <5 x float> %fadd
49 %fneg = fneg double %fadd
59 %fneg = fneg <2 x double> %fadd
69 %fneg = fneg <3 x double> %fadd
79 %fneg = fneg half %fadd
89 %fneg = fneg <2 x half> %fadd
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/Analysis/CostModel/AMDGPU/
H A Dfneg.ll5 ; CHECK: estimated cost of 0 for instruction: %fneg = fneg float
9 %fneg = fneg float %fadd
19 %fneg = fneg <2 x float> %fadd
29 %fneg = fneg <3 x float> %fadd
39 %fneg = fneg <5 x float> %fadd
49 %fneg = fneg double %fadd
59 %fneg = fneg <2 x double> %fadd
69 %fneg = fneg <3 x double> %fadd
79 %fneg = fneg half %fadd
89 %fneg = fneg <2 x half> %fadd
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/Analysis/CostModel/AMDGPU/
H A Dfneg.ll5 ; CHECK: estimated cost of 0 for instruction: %fneg = fneg float
9 %fneg = fneg float %fadd
19 %fneg = fneg <2 x float> %fadd
29 %fneg = fneg <3 x float> %fadd
39 %fneg = fneg <5 x float> %fadd
49 %fneg = fneg double %fadd
59 %fneg = fneg <2 x double> %fadd
69 %fneg = fneg <3 x double> %fadd
79 %fneg = fneg half %fadd
89 %fneg = fneg <2 x half> %fadd
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/Analysis/CostModel/AMDGPU/
H A Dfneg.ll5 ; CHECK: estimated cost of 0 for instruction: %fneg = fneg float
9 %fneg = fneg float %fadd
19 %fneg = fneg <2 x float> %fadd
29 %fneg = fneg <3 x float> %fadd
39 %fneg = fneg <5 x float> %fadd
49 %fneg = fneg double %fadd
59 %fneg = fneg <2 x double> %fadd
69 %fneg = fneg <3 x double> %fadd
79 %fneg = fneg half %fadd
89 %fneg = fneg <2 x half> %fadd
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/Analysis/CostModel/AMDGPU/
H A Dfneg.ll5 ; CHECK: estimated cost of 0 for instruction: %fneg = fneg float
9 %fneg = fneg float %fadd
19 %fneg = fneg <2 x float> %fadd
29 %fneg = fneg <3 x float> %fadd
39 %fneg = fneg <5 x float> %fadd
49 %fneg = fneg double %fadd
59 %fneg = fneg <2 x double> %fadd
69 %fneg = fneg <3 x double> %fadd
79 %fneg = fneg half %fadd
89 %fneg = fneg <2 x half> %fadd
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/Analysis/CostModel/AMDGPU/
H A Dfneg.ll23 %f32 = fneg float undef
24 %v2f32 = fneg <2 x float> undef
25 %v3f32 = fneg <3 x float> undef
26 %v4f32 = fneg <4 x float> undef
27 %v5f32 = fneg <5 x float> undef
48 %f64 = fneg double undef
73 %f16 = fneg half undef
74 %v2f16 = fneg <2 x half> undef
75 %v3f16 = fneg <3 x half> undef
76 %v4f16 = fneg <4 x half> undef
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/Transforms/InstCombine/
H A Dfneg.ll11 %f = fneg float %a
12 %r = fneg float %f
34 %r = fneg float %m
83 %r = fneg float %m
128 %r = fneg float %d
177 %r = fneg float %d
222 %r = fneg float %d
331 %r = fneg float %d
498 %r = fneg float %a
623 %r = fneg float %s
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/
H A Dfneg-combines.ll29 %fneg = fneg float %add
52 %fneg = fneg float %add
82 %fneg = fneg float %add
107 %fneg.a = fneg float %a
109 %fneg = fneg float %add
131 %fneg.b = fneg float %b
133 %fneg = fneg float %add
155 %fneg.a = fneg float %a
156 %fneg.b = fneg float %b
158 %fneg = fneg float %add
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/Transforms/InstCombine/
H A Dfneg.ll11 %f = fneg float %a
12 %r = fneg float %f
34 %r = fneg float %m
83 %r = fneg float %m
128 %r = fneg float %d
177 %r = fneg float %d
222 %r = fneg float %d
331 %r = fneg float %d
450 %r = fneg float %a
575 %r = fneg float %s
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/Transforms/InstCombine/
H A Dfneg.ll11 %f = fneg float %a
12 %r = fneg float %f
34 %r = fneg float %m
83 %r = fneg float %m
128 %r = fneg float %d
177 %r = fneg float %d
222 %r = fneg float %d
331 %r = fneg float %d
450 %r = fneg float %a
575 %r = fneg float %s
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/Transforms/InstCombine/
H A Dfneg.ll11 %f = fneg float %a
12 %r = fneg float %f
34 %r = fneg float %m
83 %r = fneg float %m
128 %r = fneg float %d
177 %r = fneg float %d
222 %r = fneg float %d
331 %r = fneg float %d
450 %r = fneg float %a
575 %r = fneg float %s
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/Transforms/InstCombine/
H A Dfneg.ll11 %f = fneg float %a
12 %r = fneg float %f
34 %r = fneg float %m
83 %r = fneg float %m
128 %r = fneg float %d
177 %r = fneg float %d
222 %r = fneg float %d
331 %r = fneg float %d
450 %r = fneg float %a
575 %r = fneg float %s
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dfneg-combines.ll29 %fneg = fneg float %add
52 %fneg = fneg float %add
82 %fneg = fneg float %add
107 %fneg.a = fneg float %a
109 %fneg = fneg float %add
131 %fneg.b = fneg float %b
133 %fneg = fneg float %add
155 %fneg.a = fneg float %a
156 %fneg.b = fneg float %b
158 %fneg = fneg float %add
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/
H A Dfneg-combines.ll29 %fneg = fneg float %add
52 %fneg = fneg float %add
82 %fneg = fneg float %add
107 %fneg.a = fneg float %a
109 %fneg = fneg float %add
131 %fneg.b = fneg float %b
133 %fneg = fneg float %add
155 %fneg.a = fneg float %a
156 %fneg.b = fneg float %b
158 %fneg = fneg float %add
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dfneg-combines.ll29 %fneg = fneg float %add
52 %fneg = fneg float %add
82 %fneg = fneg float %add
107 %fneg.a = fneg float %a
109 %fneg = fneg float %add
131 %fneg.b = fneg float %b
133 %fneg = fneg float %add
155 %fneg.a = fneg float %a
156 %fneg.b = fneg float %b
158 %fneg = fneg float %add
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dfneg-combines.ll29 %fneg = fneg float %add
52 %fneg = fneg float %add
82 %fneg = fneg float %add
107 %fneg.a = fneg float %a
109 %fneg = fneg float %add
131 %fneg.b = fneg float %b
133 %fneg = fneg float %add
155 %fneg.a = fneg float %a
156 %fneg.b = fneg float %b
158 %fneg = fneg float %add
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dfneg-combines.ll29 %fneg = fneg float %add
52 %fneg = fneg float %add
82 %fneg = fneg float %add
107 %fneg.a = fneg float %a
109 %fneg = fneg float %add
131 %fneg.b = fneg float %b
133 %fneg = fneg float %add
155 %fneg.a = fneg float %a
156 %fneg.b = fneg float %b
158 %fneg = fneg float %add
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dfneg-combines.ll29 %fneg = fneg float %add
52 %fneg = fneg float %add
82 %fneg = fneg float %add
107 %fneg.a = fneg float %a
109 %fneg = fneg float %add
131 %fneg.b = fneg float %b
133 %fneg = fneg float %add
155 %fneg.a = fneg float %a
156 %fneg.b = fneg float %b
158 %fneg = fneg float %add
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/X86/
H A Dfma-signed-zero.ll4 ; This test checks that (fneg (fma (fneg x), y, (fneg z))) can't be folded to (fma x, y, z)
15 %negx = fneg float %x
16 %negz = fneg float %z
18 %n = fneg float %fma
27 %negx = fneg float %x
28 %negz = fneg float %z
30 %n = fneg float %fma
42 %negx = fneg double %x
43 %negz = fneg double %z
45 %n = fneg double %fma
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/X86/
H A Dfma-signed-zero.ll4 ; This test checks that (fneg (fma (fneg x), y, (fneg z))) can't be folded to (fma x, y, z)
15 %negx = fneg float %x
16 %negz = fneg float %z
18 %n = fneg float %fma
27 %negx = fneg float %x
28 %negz = fneg float %z
30 %n = fneg float %fma
42 %negx = fneg double %x
43 %negz = fneg double %z
45 %n = fneg double %fma
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/X86/
H A Dfma-signed-zero.ll4 ; This test checks that (fneg (fma (fneg x), y, (fneg z))) can't be folded to (fma x, y, z)
15 %negx = fneg float %x
16 %negz = fneg float %z
18 %n = fneg float %fma
27 %negx = fneg float %x
28 %negz = fneg float %z
30 %n = fneg float %fma
42 %negx = fneg double %x
43 %negz = fneg double %z
45 %n = fneg double %fma
[all …]

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