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Searched refs:getEXTEND_VECTOR_INREG (Results 1 – 9 of 9) sorted by relevance

/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp6589 static SDValue getEXTEND_VECTOR_INREG(unsigned Opcode, const SDLoc &DL, EVT VT, in getEXTEND_VECTOR_INREG() function
13452 InputV = getEXTEND_VECTOR_INREG(AnyExt ? ISD::ANY_EXTEND : ISD::ZERO_EXTEND, in lowerShuffleAsSpecificZeroOrAnyExtend()
31578 SDValue Lo = getEXTEND_VECTOR_INREG(N->getOpcode(), dl, LoVT, In, DAG); in ReplaceNodeResults()
31588 Hi = getEXTEND_VECTOR_INREG(N->getOpcode(), dl, HiVT, Hi, DAG); in ReplaceNodeResults()
45165 return getEXTEND_VECTOR_INREG(ExtOpc, SDLoc(N), VT, N0.getOperand(0), in combineVectorPack()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp6280 static SDValue getEXTEND_VECTOR_INREG(unsigned Opcode, const SDLoc &DL, EVT VT, in getEXTEND_VECTOR_INREG() function
12925 InputV = getEXTEND_VECTOR_INREG(AnyExt ? ISD::ANY_EXTEND : ISD::ZERO_EXTEND, in lowerShuffleAsSpecificZeroOrAnyExtend()
30135 SDValue Lo = getEXTEND_VECTOR_INREG(N->getOpcode(), dl, LoVT, In, DAG); in ReplaceNodeResults()
30145 Hi = getEXTEND_VECTOR_INREG(N->getOpcode(), dl, HiVT, Hi, DAG); in ReplaceNodeResults()
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp6370 static SDValue getEXTEND_VECTOR_INREG(unsigned Opcode, const SDLoc &DL, EVT VT, in getEXTEND_VECTOR_INREG() function
13173 InputV = getEXTEND_VECTOR_INREG(AnyExt ? ISD::ANY_EXTEND : ISD::ZERO_EXTEND, in lowerShuffleAsSpecificZeroOrAnyExtend()
30871 SDValue Lo = getEXTEND_VECTOR_INREG(N->getOpcode(), dl, LoVT, In, DAG); in ReplaceNodeResults()
30881 Hi = getEXTEND_VECTOR_INREG(N->getOpcode(), dl, HiVT, Hi, DAG); in ReplaceNodeResults()
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/X86/
H A DX86ISelLowering.cpp6370 static SDValue getEXTEND_VECTOR_INREG(unsigned Opcode, const SDLoc &DL, EVT VT, in getEXTEND_VECTOR_INREG() function
13173 InputV = getEXTEND_VECTOR_INREG(AnyExt ? ISD::ANY_EXTEND : ISD::ZERO_EXTEND, in lowerShuffleAsSpecificZeroOrAnyExtend()
30871 SDValue Lo = getEXTEND_VECTOR_INREG(N->getOpcode(), dl, LoVT, In, DAG); in ReplaceNodeResults()
30881 Hi = getEXTEND_VECTOR_INREG(N->getOpcode(), dl, HiVT, Hi, DAG); in ReplaceNodeResults()
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp6323 static SDValue getEXTEND_VECTOR_INREG(unsigned Opcode, const SDLoc &DL, EVT VT, in getEXTEND_VECTOR_INREG() function
13050 InputV = getEXTEND_VECTOR_INREG(AnyExt ? ISD::ANY_EXTEND : ISD::ZERO_EXTEND, in lowerShuffleAsSpecificZeroOrAnyExtend()
30363 SDValue Lo = getEXTEND_VECTOR_INREG(N->getOpcode(), dl, LoVT, In, DAG); in ReplaceNodeResults()
30373 Hi = getEXTEND_VECTOR_INREG(N->getOpcode(), dl, HiVT, Hi, DAG); in ReplaceNodeResults()
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp6364 static SDValue getEXTEND_VECTOR_INREG(unsigned Opcode, const SDLoc &DL, EVT VT, in getEXTEND_VECTOR_INREG() function
13167 InputV = getEXTEND_VECTOR_INREG(AnyExt ? ISD::ANY_EXTEND : ISD::ZERO_EXTEND, in lowerShuffleAsSpecificZeroOrAnyExtend()
30865 SDValue Lo = getEXTEND_VECTOR_INREG(N->getOpcode(), dl, LoVT, In, DAG); in ReplaceNodeResults()
30875 Hi = getEXTEND_VECTOR_INREG(N->getOpcode(), dl, HiVT, Hi, DAG); in ReplaceNodeResults()
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp6370 static SDValue getEXTEND_VECTOR_INREG(unsigned Opcode, const SDLoc &DL, EVT VT, in getEXTEND_VECTOR_INREG() function
13173 InputV = getEXTEND_VECTOR_INREG(AnyExt ? ISD::ANY_EXTEND : ISD::ZERO_EXTEND, in lowerShuffleAsSpecificZeroOrAnyExtend()
30871 SDValue Lo = getEXTEND_VECTOR_INREG(N->getOpcode(), dl, LoVT, In, DAG); in ReplaceNodeResults()
30881 Hi = getEXTEND_VECTOR_INREG(N->getOpcode(), dl, HiVT, Hi, DAG); in ReplaceNodeResults()
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp6323 static SDValue getEXTEND_VECTOR_INREG(unsigned Opcode, const SDLoc &DL, EVT VT, in getEXTEND_VECTOR_INREG() function
13050 InputV = getEXTEND_VECTOR_INREG(AnyExt ? ISD::ANY_EXTEND : ISD::ZERO_EXTEND, in lowerShuffleAsSpecificZeroOrAnyExtend()
30363 SDValue Lo = getEXTEND_VECTOR_INREG(N->getOpcode(), dl, LoVT, In, DAG); in ReplaceNodeResults()
30373 Hi = getEXTEND_VECTOR_INREG(N->getOpcode(), dl, HiVT, Hi, DAG); in ReplaceNodeResults()
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp6370 static SDValue getEXTEND_VECTOR_INREG(unsigned Opcode, const SDLoc &DL, EVT VT, in getEXTEND_VECTOR_INREG() function
13173 InputV = getEXTEND_VECTOR_INREG(AnyExt ? ISD::ANY_EXTEND : ISD::ZERO_EXTEND, in lowerShuffleAsSpecificZeroOrAnyExtend()
30871 SDValue Lo = getEXTEND_VECTOR_INREG(N->getOpcode(), dl, LoVT, In, DAG); in ReplaceNodeResults()
30881 Hi = getEXTEND_VECTOR_INREG(N->getOpcode(), dl, HiVT, Hi, DAG); in ReplaceNodeResults()