| /dports/devel/ispc/ispc-1.16.1/llvm_patches/ |
| H A D | 10_0_vXi1calling_avx512_i8_i16.patch | 7 …[X86] Convert vXi1 vectors to xmm/ymm/zmm types via getRegisterTypeForCallingConv rather than usin…
72 MVT X86TargetLowering::getRegisterTypeForCallingConv(LLVMContext &Context,
105 return TargetLowering::getRegisterTypeForCallingConv(Context, CC, VT);
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| H A D | 9_0_10_0_avx512_disable_fast_isel_vxi1.patch | 14 from getRegisterTypeForCallingConv before the td file generated
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| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 70 MVT RegisterVT = TLI.getRegisterTypeForCallingConv( in handle()
550 MVT RegisterVT = TLI.getRegisterTypeForCallingConv(F.getContext(), in subTargetRegTypeForCallingConv()
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| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 73 MVT RegisterVT = TLI.getRegisterTypeForCallingConv( in handle()
646 MVT RegisterVT = TLI.getRegisterTypeForCallingConv(F.getContext(), in subTargetRegTypeForCallingConv()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 73 MVT RegisterVT = TLI.getRegisterTypeForCallingConv( in handle()
645 MVT RegisterVT = TLI.getRegisterTypeForCallingConv(F.getContext(), in subTargetRegTypeForCallingConv()
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| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 73 MVT RegisterVT = TLI.getRegisterTypeForCallingConv( in handle()
645 MVT RegisterVT = TLI.getRegisterTypeForCallingConv(F.getContext(), in subTargetRegTypeForCallingConv()
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 73 MVT RegisterVT = TLI.getRegisterTypeForCallingConv( in handle()
639 MVT RegisterVT = TLI.getRegisterTypeForCallingConv(F.getContext(), in subTargetRegTypeForCallingConv()
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 187 CurVT = TLI->getRegisterTypeForCallingConv( in handleAssignments()
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 73 MVT RegisterVT = TLI.getRegisterTypeForCallingConv( in handle()
683 MVT RegisterVT = TLI.getRegisterTypeForCallingConv(F.getContext(), in subTargetRegTypeForCallingConv()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 254 MVT NewVT = TLI->getRegisterTypeForCallingConv( in handleAssignments()
577 MVT RegVT = TLI->getRegisterTypeForCallingConv(Context, CallConv, VT); in getReturnInfo()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 73 MVT RegisterVT = TLI.getRegisterTypeForCallingConv( in handle()
647 MVT RegisterVT = TLI.getRegisterTypeForCallingConv(F.getContext(), in subTargetRegTypeForCallingConv()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 73 MVT RegisterVT = TLI.getRegisterTypeForCallingConv( in handle()
683 MVT RegisterVT = TLI.getRegisterTypeForCallingConv(F.getContext(), in subTargetRegTypeForCallingConv()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 73 MVT RegisterVT = TLI.getRegisterTypeForCallingConv( in handle()
683 MVT RegisterVT = TLI.getRegisterTypeForCallingConv(F.getContext(), in subTargetRegTypeForCallingConv()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 254 MVT NewVT = TLI->getRegisterTypeForCallingConv( in handleAssignments()
577 MVT RegVT = TLI->getRegisterTypeForCallingConv(Context, CallConv, VT); in getReturnInfo()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 73 MVT RegisterVT = TLI.getRegisterTypeForCallingConv( in handle()
647 MVT RegisterVT = TLI.getRegisterTypeForCallingConv(F.getContext(), in subTargetRegTypeForCallingConv()
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| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.h | 29 MVT getRegisterTypeForCallingConv(LLVMContext &Context,
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 421 MVT RegisterVT = TLI.getRegisterTypeForCallingConv(F.getContext(), in subTargetRegTypeForCallingConv()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.h | 29 MVT getRegisterTypeForCallingConv(LLVMContext &Context,
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.h | 318 MVT getRegisterTypeForCallingConv(LLVMContext &Context, CallingConv::ID CC,
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 202 MVT NewVT = TLI->getRegisterTypeForCallingConv( in handleAssignments()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.h | 318 MVT getRegisterTypeForCallingConv(LLVMContext &Context, CallingConv::ID CC,
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 197 MVT NewVT = TLI->getRegisterTypeForCallingConv( in handleAssignments()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 202 MVT NewVT = TLI->getRegisterTypeForCallingConv( in handleAssignments()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 197 MVT NewVT = TLI->getRegisterTypeForCallingConv( in handleAssignments()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.h | 318 MVT getRegisterTypeForCallingConv(LLVMContext &Context, CallingConv::ID CC,
|