Searched refs:gmii_rx_dv (Results 1 – 12 of 12) sorted by relevance
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/n3xx/sim/one_gig_eth_loopback/ |
H A D | demo_one_gig_pcs_pma_mdio.v | 203 wire gmii_rx_dv; net 306 .gmii_rx_dv (gmii_rx_dv), 337 .gmii_rx_dv (gmii_rx_dv),
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H A D | one_gig_eth_loopback_tb.sv | 141 .gmii_rx_dv(m_gmii_rx_dv), // Received control signal to client MAC. 204 .gmii_rx_dv(s_gmii_rx_dv), // Received control signal to client MAC.
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/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/x300/ip/one_gig_eth_pcs_pma/ |
H A D | one_gige_phy.v | 25 output reg gmii_rx_dv, // Received control signal to client MAC. port 56 gmii_rx_dv <= gmii_rx_dv_int; 82 .gmii_rx_dv (gmii_rx_dv_int),
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H A D | one_gige_phy.xdc | 84 #set_property IOSTANDARD LVCMOS33 [get_ports gmii_rx_dv] 127 set_property SLEW FAST [get_ports gmii_rx_dv]
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/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/e320/ip/one_gig_eth_pcs_pma/ |
H A D | one_gige_phy.v | 25 output reg gmii_rx_dv, // Received control signal to client MAC. port 57 gmii_rx_dv <= gmii_rx_dv_int; 83 .gmii_rx_dv (gmii_rx_dv_int),
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/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/n3xx/ip/one_gig_eth_pcs_pma/ |
H A D | one_gige_phy.v | 27 output reg gmii_rx_dv, // Received control signal to client MAC. port 60 gmii_rx_dv <= gmii_rx_dv_int; 86 .gmii_rx_dv (gmii_rx_dv_int),
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H A D | one_gig_eth_pcs_pma_support.v | 90 output gmii_rx_dv, // Received control signal to client MAC. port 171 .gmii_rx_dv (gmii_rx_dv),
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H A D | one_gige_phy.xdc | 84 #set_property IOSTANDARD LVCMOS33 [get_ports gmii_rx_dv] 127 set_property SLEW FAST [get_ports gmii_rx_dv]
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/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/n3xx/ |
H A D | n3xx_mgt_io_core.v | 423 wire gmii_tx_en, gmii_tx_er, gmii_rx_dv, gmii_rx_er; net 451 .gmii_rx_dv(gmii_rx_dv), // Received control signal to client MAC. 482 .gmii_rx_dv(gmii_rx_dv), // Received control signal to client MAC. 511 .GMII_RX_DV(gmii_rx_dv),
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/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/x300/ |
H A D | x300_sfpp_io_core.v | 202 wire gmii_tx_en, gmii_tx_er, gmii_rx_dv, gmii_rx_er; net 224 .gmii_rx_dv(gmii_rx_dv), // Received control signal to client MAC. 248 .GMII_RX_DV(gmii_rx_dv),
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/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/e320/ |
H A D | n3xx_mgt_io_core.v | 370 wire gmii_tx_en, gmii_tx_er, gmii_rx_dv, gmii_rx_er; net 395 .gmii_rx_dv(gmii_rx_dv), // Received control signal to client MAC. 420 .GMII_RX_DV(gmii_rx_dv),
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/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/simple_gemac/ |
H A D | gmii_to_axis.v | 25 input gmii_rx_dv, port 80 .GMII_RX_DV(gmii_rx_dv),
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