/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/gallium/drivers/radeonsi/ |
H A D | si_compute.c | 700 unsigned grid_size_reg = R_00B900_COMPUTE_USER_DATA_0 + 4 * SI_NUM_RESOURCE_SGPRS; in si_setup_nir_user_data() local 701 unsigned block_size_reg = grid_size_reg + in si_setup_nir_user_data() 709 si_cp_copy_data(sctx, sctx->gfx_cs, COPY_DATA_REG, NULL, (grid_size_reg >> 2) + i, in si_setup_nir_user_data() 714 radeon_set_sh_reg_seq(cs, grid_size_reg, 3); in si_setup_nir_user_data()
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/dports/lang/clover/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
H A D | si_compute.c | 727 unsigned grid_size_reg = R_00B900_COMPUTE_USER_DATA_0 + 4 * SI_NUM_RESOURCE_SGPRS; in si_setup_nir_user_data() local 728 unsigned block_size_reg = grid_size_reg + in si_setup_nir_user_data() 740 si_cp_copy_data(sctx, &sctx->gfx_cs, COPY_DATA_REG, NULL, (grid_size_reg >> 2) + i, in si_setup_nir_user_data() 746 radeon_set_sh_reg_seq(grid_size_reg, 3); in si_setup_nir_user_data()
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/dports/graphics/libosmesa/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
H A D | si_compute.c | 727 unsigned grid_size_reg = R_00B900_COMPUTE_USER_DATA_0 + 4 * SI_NUM_RESOURCE_SGPRS; in si_setup_nir_user_data() local 728 unsigned block_size_reg = grid_size_reg + in si_setup_nir_user_data() 740 si_cp_copy_data(sctx, &sctx->gfx_cs, COPY_DATA_REG, NULL, (grid_size_reg >> 2) + i, in si_setup_nir_user_data() 746 radeon_set_sh_reg_seq(grid_size_reg, 3); in si_setup_nir_user_data()
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/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
H A D | si_compute.c | 727 unsigned grid_size_reg = R_00B900_COMPUTE_USER_DATA_0 + 4 * SI_NUM_RESOURCE_SGPRS; in si_setup_nir_user_data() local 728 unsigned block_size_reg = grid_size_reg + in si_setup_nir_user_data() 740 si_cp_copy_data(sctx, &sctx->gfx_cs, COPY_DATA_REG, NULL, (grid_size_reg >> 2) + i, in si_setup_nir_user_data() 746 radeon_set_sh_reg_seq(grid_size_reg, 3); in si_setup_nir_user_data()
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/dports/graphics/mesa-libs/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
H A D | si_compute.c | 727 unsigned grid_size_reg = R_00B900_COMPUTE_USER_DATA_0 + 4 * SI_NUM_RESOURCE_SGPRS; in si_setup_nir_user_data() local 728 unsigned block_size_reg = grid_size_reg + in si_setup_nir_user_data() 740 si_cp_copy_data(sctx, &sctx->gfx_cs, COPY_DATA_REG, NULL, (grid_size_reg >> 2) + i, in si_setup_nir_user_data() 746 radeon_set_sh_reg_seq(grid_size_reg, 3); in si_setup_nir_user_data()
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/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
H A D | si_compute.c | 727 unsigned grid_size_reg = R_00B900_COMPUTE_USER_DATA_0 + 4 * SI_NUM_RESOURCE_SGPRS; in si_setup_nir_user_data() local 728 unsigned block_size_reg = grid_size_reg + in si_setup_nir_user_data() 740 si_cp_copy_data(sctx, &sctx->gfx_cs, COPY_DATA_REG, NULL, (grid_size_reg >> 2) + i, in si_setup_nir_user_data() 746 radeon_set_sh_reg_seq(grid_size_reg, 3); in si_setup_nir_user_data()
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/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
H A D | si_compute.c | 727 unsigned grid_size_reg = R_00B900_COMPUTE_USER_DATA_0 + 4 * SI_NUM_RESOURCE_SGPRS; in si_setup_nir_user_data() local 728 unsigned block_size_reg = grid_size_reg + in si_setup_nir_user_data() 740 si_cp_copy_data(sctx, &sctx->gfx_cs, COPY_DATA_REG, NULL, (grid_size_reg >> 2) + i, in si_setup_nir_user_data() 746 radeon_set_sh_reg_seq(grid_size_reg, 3); in si_setup_nir_user_data()
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/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
H A D | si_compute.c | 727 unsigned grid_size_reg = R_00B900_COMPUTE_USER_DATA_0 + 4 * SI_NUM_RESOURCE_SGPRS; in si_setup_nir_user_data() local 728 unsigned block_size_reg = grid_size_reg + in si_setup_nir_user_data() 740 si_cp_copy_data(sctx, &sctx->gfx_cs, COPY_DATA_REG, NULL, (grid_size_reg >> 2) + i, in si_setup_nir_user_data() 746 radeon_set_sh_reg_seq(grid_size_reg, 3); in si_setup_nir_user_data()
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/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
H A D | si_compute.c | 727 unsigned grid_size_reg = R_00B900_COMPUTE_USER_DATA_0 + 4 * SI_NUM_RESOURCE_SGPRS; in si_setup_nir_user_data() local 728 unsigned block_size_reg = grid_size_reg + in si_setup_nir_user_data() 740 si_cp_copy_data(sctx, &sctx->gfx_cs, COPY_DATA_REG, NULL, (grid_size_reg >> 2) + i, in si_setup_nir_user_data() 746 radeon_set_sh_reg_seq(grid_size_reg, 3); in si_setup_nir_user_data()
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/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/gallium/drivers/radeonsi/ |
H A D | si_compute.c | 737 unsigned grid_size_reg = R_00B900_COMPUTE_USER_DATA_0 + 4 * SI_NUM_RESOURCE_SGPRS; in si_setup_nir_user_data() local 738 unsigned block_size_reg = grid_size_reg + in si_setup_nir_user_data() 750 si_cp_copy_data(sctx, &sctx->gfx_cs, COPY_DATA_REG, NULL, (grid_size_reg >> 2) + i, in si_setup_nir_user_data() 756 radeon_set_sh_reg_seq(grid_size_reg, 3); in si_setup_nir_user_data()
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/dports/graphics/mesa-dri/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
H A D | si_compute.c | 727 unsigned grid_size_reg = R_00B900_COMPUTE_USER_DATA_0 + 4 * SI_NUM_RESOURCE_SGPRS; in si_setup_nir_user_data() local 728 unsigned block_size_reg = grid_size_reg + in si_setup_nir_user_data() 740 si_cp_copy_data(sctx, &sctx->gfx_cs, COPY_DATA_REG, NULL, (grid_size_reg >> 2) + i, in si_setup_nir_user_data() 746 radeon_set_sh_reg_seq(grid_size_reg, 3); in si_setup_nir_user_data()
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