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Searched refs:hadd (Results 1 – 25 of 750) sorted by relevance

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/dports/devel/intel-graphics-compiler/intel-graphics-compiler-igc-1.0.9636/IGC/BiFModule/Languages/OpenCL/Integer/
H A Dhadd.cl14 char OVERLOADABLE hadd( char x,
21 char2 OVERLOADABLE hadd( char2 x,
28 char3 OVERLOADABLE hadd( char3 x,
35 char4 OVERLOADABLE hadd( char4 x,
42 char8 OVERLOADABLE hadd( char8 x,
56 uchar OVERLOADABLE hadd( uchar x,
182 int OVERLOADABLE hadd( int x,
189 int2 OVERLOADABLE hadd( int2 x,
196 int3 OVERLOADABLE hadd( int3 x,
203 int4 OVERLOADABLE hadd( int4 x,
[all …]
/dports/graphics/libvisual04-plugins/libvisual-plugins-0.4.0/plugins/morph/slide/
H A Dmorph_slide.c200 int hadd; in lv_morph_slide_apply() local
215 hadd = dest->height * rate; in lv_morph_slide_apply()
235 visual_mem_copy (destbuf, srcbuf1 + (hadd * dest->pitch), (dest->height - hadd) * dest->pitch); in lv_morph_slide_apply()
236 visual_mem_copy (destbuf + ((dest->height - hadd) * dest->pitch), srcbuf2, hadd * dest->pitch); in lv_morph_slide_apply()
241 visual_mem_copy (destbuf, srcbuf2 + (hadd * dest->pitch), (dest->height - hadd) * dest->pitch); in lv_morph_slide_apply()
242 visual_mem_copy (destbuf + ((dest->height - hadd) * dest->pitch), srcbuf1, hadd * dest->pitch); in lv_morph_slide_apply()
/dports/lang/spidermonkey60/firefox-60.9.0/third_party/rust/simd/src/x86/
H A Dssse3.rs32 fn hadd(self, other: Self) -> Self; in hadd() method
43 fn hadd(self, other: Self) -> Self { in hadd() method
58 fn hadd(self, other: Self) -> Self; in hadd() method
63 fn hadd(self, other: Self) -> Self { in hadd() method
76 fn hadd(self, other: Self) -> Self; in hadd() method
90 fn hadd(self, other: Self) -> Self { in hadd() method
118 fn hadd(self, other: Self) -> Self; in hadd() method
123 fn hadd(self, other: Self) -> Self { in hadd() method
H A Dsse3.rs15 fn hadd(self, other: Self) -> Self; in hadd() method
26 fn hadd(self, other: Self) -> Self { in hadd() method
38 fn hadd(self, other: Self) -> Self; in hadd() method
49 fn hadd(self, other: Self) -> Self { in hadd() method
/dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/third_party/libaom/source/libaom/av1/encoder/x86/
H A Dml_sse3.c66 __m128 hadd[2]; in nn_propagate_4to4() local
72 hadd[i] = _mm_hadd_ps(mul0, mul1); in nn_propagate_4to4()
77 const __m128 hh = _mm_hadd_ps(hadd[0], hadd[1]); in nn_propagate_4to4()
88 __m128 hadd[4]; in nn_propagate_4to8() local
94 hadd[i] = _mm_hadd_ps(mul0, mul1); in nn_propagate_4to8()
101 const __m128 hh0 = _mm_hadd_ps(hadd[0], hadd[1]); in nn_propagate_4to8()
103 const __m128 hh1 = _mm_hadd_ps(hadd[2], hadd[3]); in nn_propagate_4to8()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/libaom/source/libaom/av1/encoder/x86/
H A Dml_sse3.c66 __m128 hadd[2]; in nn_propagate_4to4() local
72 hadd[i] = _mm_hadd_ps(mul0, mul1); in nn_propagate_4to4()
77 const __m128 hh = _mm_hadd_ps(hadd[0], hadd[1]); in nn_propagate_4to4()
88 __m128 hadd[4]; in nn_propagate_4to8() local
94 hadd[i] = _mm_hadd_ps(mul0, mul1); in nn_propagate_4to8()
101 const __m128 hh0 = _mm_hadd_ps(hadd[0], hadd[1]); in nn_propagate_4to8()
103 const __m128 hh1 = _mm_hadd_ps(hadd[2], hadd[3]); in nn_propagate_4to8()
/dports/graphics/dssim/dssim-3.1.2/cargo-crates/libaom-sys-0.9.1/vendor/av1/encoder/x86/
H A Dml_sse3.c66 __m128 hadd[2]; in nn_propagate_4to4() local
72 hadd[i] = _mm_hadd_ps(mul0, mul1); in nn_propagate_4to4()
77 const __m128 hh = _mm_hadd_ps(hadd[0], hadd[1]); in nn_propagate_4to4()
88 __m128 hadd[4]; in nn_propagate_4to8() local
94 hadd[i] = _mm_hadd_ps(mul0, mul1); in nn_propagate_4to8()
101 const __m128 hh0 = _mm_hadd_ps(hadd[0], hadd[1]); in nn_propagate_4to8()
103 const __m128 hh1 = _mm_hadd_ps(hadd[2], hadd[3]); in nn_propagate_4to8()
/dports/multimedia/aom/aom-3.2.0/av1/encoder/x86/
H A Dml_sse3.c66 __m128 hadd[2]; in nn_propagate_4to4() local
72 hadd[i] = _mm_hadd_ps(mul0, mul1); in nn_propagate_4to4()
77 const __m128 hh = _mm_hadd_ps(hadd[0], hadd[1]); in nn_propagate_4to4()
88 __m128 hadd[4]; in nn_propagate_4to8() local
94 hadd[i] = _mm_hadd_ps(mul0, mul1); in nn_propagate_4to8()
101 const __m128 hh0 = _mm_hadd_ps(hadd[0], hadd[1]); in nn_propagate_4to8()
103 const __m128 hh1 = _mm_hadd_ps(hadd[2], hadd[3]); in nn_propagate_4to8()
/dports/math/kfr/kfr-4.2.1/include/kfr/simd/
H A Dhorizontal.hpp65 KFR_INTRINSIC T hadd(const vec<T, N>& value) in hadd() function
69 KFR_FN(hadd) in KFR_FN() argument
118 return hadd(x * y); in KFR_FN()
126 return hadd(value) / N; in KFR_FN()
134 return builtin_sqrt(hadd(value * value) / N); in KFR_FN()
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/Thumb2/mve-intrinsics/
H A Dvhaddq.ll50 …%2 = tail call <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, i32…
56 declare <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8>, <16 x i8>, i32, <16 x i1>, <…
68 …%2 = tail call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 …
74 declare <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16>, <8 x i16>, i32, <8 x i1>, <8 …
86 …%2 = tail call <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i32 …
92 declare <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32>, <4 x i32>, i32, <4 x i1>, <4 …
104 …%2 = tail call <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, i32…
118 …%2 = tail call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 …
132 …%2 = tail call <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i32 …
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/Thumb2/mve-intrinsics/
H A Dvhaddq.ll50 …%2 = tail call <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, i32…
56 declare <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8>, <16 x i8>, i32, <16 x i1>, <…
68 …%2 = tail call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 …
74 declare <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16>, <8 x i16>, i32, <8 x i1>, <8 …
86 …%2 = tail call <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i32 …
92 declare <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32>, <4 x i32>, i32, <4 x i1>, <4 …
104 …%2 = tail call <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, i32…
118 …%2 = tail call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 …
132 …%2 = tail call <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i32 …
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/Thumb2/mve-intrinsics/
H A Dvhaddq.ll50 …%2 = tail call <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, i32…
56 declare <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8>, <16 x i8>, i32, <16 x i1>, <…
68 …%2 = tail call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 …
74 declare <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16>, <8 x i16>, i32, <8 x i1>, <8 …
86 …%2 = tail call <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i32 …
92 declare <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32>, <4 x i32>, i32, <4 x i1>, <4 …
104 …%2 = tail call <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, i32…
118 …%2 = tail call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 …
132 …%2 = tail call <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i32 …
248 …%2 = call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %.splat, i32 …
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/Thumb2/mve-intrinsics/
H A Dvhaddq.ll50 …%2 = tail call <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, i32…
56 declare <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8>, <16 x i8>, i32, <16 x i1>, <…
68 …%2 = tail call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 …
74 declare <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16>, <8 x i16>, i32, <8 x i1>, <8 …
86 …%2 = tail call <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i32 …
92 declare <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32>, <4 x i32>, i32, <4 x i1>, <4 …
104 …%2 = tail call <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, i32…
118 …%2 = tail call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 …
132 …%2 = tail call <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i32 …
248 …%2 = call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %.splat, i32 …
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/Thumb2/mve-intrinsics/
H A Dvhaddq.ll50 …%2 = tail call <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, i32…
56 declare <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8>, <16 x i8>, i32, <16 x i1>, <…
68 …%2 = tail call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 …
74 declare <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16>, <8 x i16>, i32, <8 x i1>, <8 …
86 …%2 = tail call <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i32 …
92 declare <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32>, <4 x i32>, i32, <4 x i1>, <4 …
104 …%2 = tail call <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, i32…
118 …%2 = tail call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 …
132 …%2 = tail call <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i32 …
248 …%2 = call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %.splat, i32 …
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/Thumb2/mve-intrinsics/
H A Dvhaddq.ll50 …%2 = tail call <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, i32…
56 declare <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8>, <16 x i8>, i32, <16 x i1>, <…
68 …%2 = tail call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 …
74 declare <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16>, <8 x i16>, i32, <8 x i1>, <8 …
86 …%2 = tail call <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i32 …
92 declare <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32>, <4 x i32>, i32, <4 x i1>, <4 …
104 …%2 = tail call <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, i32…
118 …%2 = tail call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 …
132 …%2 = tail call <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i32 …
248 …%2 = call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %.splat, i32 …
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/Thumb2/mve-intrinsics/
H A Dvhaddq.ll50 …%2 = tail call <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, i32…
56 declare <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8>, <16 x i8>, i32, <16 x i1>, <…
68 …%2 = tail call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 …
74 declare <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16>, <8 x i16>, i32, <8 x i1>, <8 …
86 …%2 = tail call <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i32 …
92 declare <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32>, <4 x i32>, i32, <4 x i1>, <4 …
104 …%2 = tail call <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, i32…
118 …%2 = tail call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 …
132 …%2 = tail call <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i32 …
248 …%2 = call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %.splat, i32 …
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/Thumb2/mve-intrinsics/
H A Dvhaddq.ll50 …%2 = tail call <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, i32…
56 declare <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8>, <16 x i8>, i32, <16 x i1>, <…
68 …%2 = tail call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 …
74 declare <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16>, <8 x i16>, i32, <8 x i1>, <8 …
86 …%2 = tail call <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i32 …
92 declare <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32>, <4 x i32>, i32, <4 x i1>, <4 …
104 …%2 = tail call <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, i32…
118 …%2 = tail call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 …
132 …%2 = tail call <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i32 …
248 …%2 = call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %.splat, i32 …
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/Thumb2/mve-intrinsics/
H A Dvhaddq.ll50 …%2 = tail call <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, i32…
56 declare <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8>, <16 x i8>, i32, <16 x i1>, <…
68 …%2 = tail call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 …
74 declare <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16>, <8 x i16>, i32, <8 x i1>, <8 …
86 …%2 = tail call <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i32 …
92 declare <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32>, <4 x i32>, i32, <4 x i1>, <4 …
104 …%2 = tail call <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, i32…
118 …%2 = tail call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 …
132 …%2 = tail call <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i32 …
248 …%2 = call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %.splat, i32 …
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/Thumb2/mve-intrinsics/
H A Dvhaddq.ll50 …%2 = tail call <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, i32…
56 declare <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8>, <16 x i8>, i32, <16 x i1>, <…
68 …%2 = tail call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 …
74 declare <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16>, <8 x i16>, i32, <8 x i1>, <8 …
86 …%2 = tail call <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i32 …
92 declare <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32>, <4 x i32>, i32, <4 x i1>, <4 …
104 …%2 = tail call <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, i32…
118 …%2 = tail call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 …
132 …%2 = tail call <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i32 …
248 …%2 = call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %.splat, i32 …
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/Thumb2/mve-intrinsics/
H A Dvhaddq.ll50 …%2 = tail call <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, i32…
56 declare <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8>, <16 x i8>, i32, <16 x i1>, <…
68 …%2 = tail call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 …
74 declare <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16>, <8 x i16>, i32, <8 x i1>, <8 …
86 …%2 = tail call <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i32 …
92 declare <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32>, <4 x i32>, i32, <4 x i1>, <4 …
104 …%2 = tail call <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, i32…
118 …%2 = tail call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 …
132 …%2 = tail call <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i32 …
248 …%2 = call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %.splat, i32 …
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/Thumb2/mve-intrinsics/
H A Dvhaddq.ll50 …%2 = tail call <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, i32…
56 declare <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8>, <16 x i8>, i32, <16 x i1>, <…
68 …%2 = tail call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 …
74 declare <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16>, <8 x i16>, i32, <8 x i1>, <8 …
86 …%2 = tail call <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i32 …
92 declare <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32>, <4 x i32>, i32, <4 x i1>, <4 …
104 …%2 = tail call <16 x i8> @llvm.arm.mve.hadd.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, i32…
118 …%2 = tail call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 …
132 …%2 = tail call <4 x i32> @llvm.arm.mve.hadd.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i32 …
248 …%2 = call <8 x i16> @llvm.arm.mve.hadd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %.splat, i32 …
[all …]
/dports/cad/feappv/feappv-4.1i/include/
H A Dprflag.h2 logical chflg,dyncon,fops,hadd,idenf,nmfl,trifl,floop
3 common /prflag/ chflg,dyncon,fops,hadd,idenf,nmfl,trifl,floop(2)
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/libclc/generic/lib/integer/
H A Dhadd.inc1 //hadd = (x+y)>>1
4 _CLC_OVERLOAD _CLC_DEF __CLC_GENTYPE hadd(__CLC_GENTYPE x, __CLC_GENTYPE y) {
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/libclc/generic/lib/integer/
H A Dhadd.inc1 //hadd = (x+y)>>1
4 _CLC_OVERLOAD _CLC_DEF __CLC_GENTYPE hadd(__CLC_GENTYPE x, __CLC_GENTYPE y) {
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/libclc/generic/lib/integer/
H A Dhadd.inc1 //hadd = (x+y)>>1
4 _CLC_OVERLOAD _CLC_DEF __CLC_GENTYPE hadd(__CLC_GENTYPE x, __CLC_GENTYPE y) {

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