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Searched refs:hw_addr (Results 1 – 25 of 1336) sorted by relevance

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/dports/net/frr7-pythontools/frr-frr-7.5.1/zebra/
H A Dzebra_vxlan_private.h121 (uint8_t)zl3vni->svi_if->hw_addr[0], in zl3vni_rmac2str()
122 (uint8_t)zl3vni->svi_if->hw_addr[1], in zl3vni_rmac2str()
123 (uint8_t)zl3vni->svi_if->hw_addr[2], in zl3vni_rmac2str()
124 (uint8_t)zl3vni->svi_if->hw_addr[3], in zl3vni_rmac2str()
125 (uint8_t)zl3vni->svi_if->hw_addr[4], in zl3vni_rmac2str()
126 (uint8_t)zl3vni->svi_if->hw_addr[5]); in zl3vni_rmac2str()
149 (uint8_t)zl3vni->svi_if->hw_addr[0], in zl3vni_sysmac2str()
150 (uint8_t)zl3vni->svi_if->hw_addr[1], in zl3vni_sysmac2str()
151 (uint8_t)zl3vni->svi_if->hw_addr[2], in zl3vni_sysmac2str()
152 (uint8_t)zl3vni->svi_if->hw_addr[3], in zl3vni_sysmac2str()
[all …]
/dports/net/frr7/frr-frr-7.5.1/zebra/
H A Dzebra_vxlan_private.h121 (uint8_t)zl3vni->svi_if->hw_addr[0], in zl3vni_rmac2str()
122 (uint8_t)zl3vni->svi_if->hw_addr[1], in zl3vni_rmac2str()
123 (uint8_t)zl3vni->svi_if->hw_addr[2], in zl3vni_rmac2str()
124 (uint8_t)zl3vni->svi_if->hw_addr[3], in zl3vni_rmac2str()
125 (uint8_t)zl3vni->svi_if->hw_addr[4], in zl3vni_rmac2str()
126 (uint8_t)zl3vni->svi_if->hw_addr[5]); in zl3vni_rmac2str()
149 (uint8_t)zl3vni->svi_if->hw_addr[0], in zl3vni_sysmac2str()
150 (uint8_t)zl3vni->svi_if->hw_addr[1], in zl3vni_sysmac2str()
151 (uint8_t)zl3vni->svi_if->hw_addr[2], in zl3vni_sysmac2str()
152 (uint8_t)zl3vni->svi_if->hw_addr[3], in zl3vni_sysmac2str()
[all …]
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/post/cpu/ppc4xx/
H A Dether.c90 static void ether_post_init (int devnum, int hw_addr) in ether_post_init() argument
145 out_be32 ((void*)(EMAC0_MR1 + hw_addr), mode_reg); in ether_post_init()
216 in_be32 ((void*)(EMAC0_MR1 + hw_addr))); in ether_post_init()
221 in_be32 ((void*)(EMAC0_MR1 + hw_addr))); in ether_post_init()
241 out_be32 ((void*)(EMAC0_TMR1 + hw_addr), 0xf8640000); in ether_post_init()
250 static void ether_post_halt (int devnum, int hw_addr) in ether_post_halt() argument
303 out_be32 ((void*)(EMAC0_TMR0 + hw_addr), in_be32 ((void*)(EMAC0_TMR0 + hw_addr)) | EMAC_TMR0_GNP0); in ether_post_send()
364 static int test_ctlr (int devnum, int hw_addr) in test_ctlr() argument
373 ether_post_init (devnum, hw_addr); in test_ctlr()
379 ether_post_send (devnum, hw_addr, packet_send, l); in test_ctlr()
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/post/cpu/ppc4xx/
H A Dether.c90 static void ether_post_init (int devnum, int hw_addr) in ether_post_init() argument
145 out_be32 ((void*)(EMAC0_MR1 + hw_addr), mode_reg); in ether_post_init()
216 in_be32 ((void*)(EMAC0_MR1 + hw_addr))); in ether_post_init()
221 in_be32 ((void*)(EMAC0_MR1 + hw_addr))); in ether_post_init()
241 out_be32 ((void*)(EMAC0_TMR1 + hw_addr), 0xf8640000); in ether_post_init()
250 static void ether_post_halt (int devnum, int hw_addr) in ether_post_halt() argument
303 out_be32 ((void*)(EMAC0_TMR0 + hw_addr), in_be32 ((void*)(EMAC0_TMR0 + hw_addr)) | EMAC_TMR0_GNP0); in ether_post_send()
364 static int test_ctlr (int devnum, int hw_addr) in test_ctlr() argument
373 ether_post_init (devnum, hw_addr); in test_ctlr()
379 ether_post_send (devnum, hw_addr, packet_send, l); in test_ctlr()
[all …]
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/post/cpu/ppc4xx/
H A Dether.c90 static void ether_post_init (int devnum, int hw_addr) in ether_post_init() argument
145 out_be32 ((void*)(EMAC0_MR1 + hw_addr), mode_reg); in ether_post_init()
216 in_be32 ((void*)(EMAC0_MR1 + hw_addr))); in ether_post_init()
221 in_be32 ((void*)(EMAC0_MR1 + hw_addr))); in ether_post_init()
241 out_be32 ((void*)(EMAC0_TMR1 + hw_addr), 0xf8640000); in ether_post_init()
250 static void ether_post_halt (int devnum, int hw_addr) in ether_post_halt() argument
303 out_be32 ((void*)(EMAC0_TMR0 + hw_addr), in_be32 ((void*)(EMAC0_TMR0 + hw_addr)) | EMAC_TMR0_GNP0); in ether_post_send()
364 static int test_ctlr (int devnum, int hw_addr) in test_ctlr() argument
373 ether_post_init (devnum, hw_addr); in test_ctlr()
379 ether_post_send (devnum, hw_addr, packet_send, l); in test_ctlr()
[all …]
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/post/cpu/ppc4xx/
H A Dether.c90 static void ether_post_init (int devnum, int hw_addr) in ether_post_init() argument
145 out_be32 ((void*)(EMAC0_MR1 + hw_addr), mode_reg); in ether_post_init()
216 in_be32 ((void*)(EMAC0_MR1 + hw_addr))); in ether_post_init()
221 in_be32 ((void*)(EMAC0_MR1 + hw_addr))); in ether_post_init()
241 out_be32 ((void*)(EMAC0_TMR1 + hw_addr), 0xf8640000); in ether_post_init()
250 static void ether_post_halt (int devnum, int hw_addr) in ether_post_halt() argument
303 out_be32 ((void*)(EMAC0_TMR0 + hw_addr), in_be32 ((void*)(EMAC0_TMR0 + hw_addr)) | EMAC_TMR0_GNP0); in ether_post_send()
364 static int test_ctlr (int devnum, int hw_addr) in test_ctlr() argument
373 ether_post_init (devnum, hw_addr); in test_ctlr()
379 ether_post_send (devnum, hw_addr, packet_send, l); in test_ctlr()
[all …]
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/post/cpu/ppc4xx/
H A Dether.c90 static void ether_post_init (int devnum, int hw_addr) in ether_post_init() argument
145 out_be32 ((void*)(EMAC0_MR1 + hw_addr), mode_reg); in ether_post_init()
216 in_be32 ((void*)(EMAC0_MR1 + hw_addr))); in ether_post_init()
221 in_be32 ((void*)(EMAC0_MR1 + hw_addr))); in ether_post_init()
241 out_be32 ((void*)(EMAC0_TMR1 + hw_addr), 0xf8640000); in ether_post_init()
250 static void ether_post_halt (int devnum, int hw_addr) in ether_post_halt() argument
303 out_be32 ((void*)(EMAC0_TMR0 + hw_addr), in_be32 ((void*)(EMAC0_TMR0 + hw_addr)) | EMAC_TMR0_GNP0); in ether_post_send()
364 static int test_ctlr (int devnum, int hw_addr) in test_ctlr() argument
373 ether_post_init (devnum, hw_addr); in test_ctlr()
379 ether_post_send (devnum, hw_addr, packet_send, l); in test_ctlr()
[all …]
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/post/cpu/ppc4xx/
H A Dether.c90 static void ether_post_init (int devnum, int hw_addr) in ether_post_init() argument
145 out_be32 ((void*)(EMAC0_MR1 + hw_addr), mode_reg); in ether_post_init()
216 in_be32 ((void*)(EMAC0_MR1 + hw_addr))); in ether_post_init()
221 in_be32 ((void*)(EMAC0_MR1 + hw_addr))); in ether_post_init()
241 out_be32 ((void*)(EMAC0_TMR1 + hw_addr), 0xf8640000); in ether_post_init()
250 static void ether_post_halt (int devnum, int hw_addr) in ether_post_halt() argument
303 out_be32 ((void*)(EMAC0_TMR0 + hw_addr), in_be32 ((void*)(EMAC0_TMR0 + hw_addr)) | EMAC_TMR0_GNP0); in ether_post_send()
364 static int test_ctlr (int devnum, int hw_addr) in test_ctlr() argument
373 ether_post_init (devnum, hw_addr); in test_ctlr()
379 ether_post_send (devnum, hw_addr, packet_send, l); in test_ctlr()
[all …]
/dports/sysutils/u-boot-utilite/u-boot-2015.07/post/cpu/ppc4xx/
H A Dether.c81 static void ether_post_init (int devnum, int hw_addr) in ether_post_init() argument
136 out_be32 ((void*)(EMAC0_MR1 + hw_addr), mode_reg); in ether_post_init()
207 in_be32 ((void*)(EMAC0_MR1 + hw_addr))); in ether_post_init()
212 in_be32 ((void*)(EMAC0_MR1 + hw_addr))); in ether_post_init()
232 out_be32 ((void*)(EMAC0_TMR1 + hw_addr), 0xf8640000); in ether_post_init()
241 static void ether_post_halt (int devnum, int hw_addr) in ether_post_halt() argument
294 out_be32 ((void*)(EMAC0_TMR0 + hw_addr), in_be32 ((void*)(EMAC0_TMR0 + hw_addr)) | EMAC_TMR0_GNP0); in ether_post_send()
357 static int test_ctlr (int devnum, int hw_addr) in test_ctlr() argument
363 ether_post_init (devnum, hw_addr); in test_ctlr()
369 ether_post_send (devnum, hw_addr, packet_send, l); in test_ctlr()
[all …]
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/post/cpu/ppc4xx/
H A Dether.c90 static void ether_post_init (int devnum, int hw_addr) in ether_post_init() argument
145 out_be32 ((void*)(EMAC0_MR1 + hw_addr), mode_reg); in ether_post_init()
216 in_be32 ((void*)(EMAC0_MR1 + hw_addr))); in ether_post_init()
221 in_be32 ((void*)(EMAC0_MR1 + hw_addr))); in ether_post_init()
241 out_be32 ((void*)(EMAC0_TMR1 + hw_addr), 0xf8640000); in ether_post_init()
250 static void ether_post_halt (int devnum, int hw_addr) in ether_post_halt() argument
303 out_be32 ((void*)(EMAC0_TMR0 + hw_addr), in_be32 ((void*)(EMAC0_TMR0 + hw_addr)) | EMAC_TMR0_GNP0); in ether_post_send()
364 static int test_ctlr (int devnum, int hw_addr) in test_ctlr() argument
373 ether_post_init (devnum, hw_addr); in test_ctlr()
379 ether_post_send (devnum, hw_addr, packet_send, l); in test_ctlr()
[all …]
/dports/net/ipxe/ipxe-2265a65/src/core/
H A Dacpimac.c78 uint8_t *hw_addr = data; in acpi_extract_mac() local
113 decoded_len = base16_decode ( mac, hw_addr, ETH_ALEN ); in acpi_extract_mac()
122 if ( ! is_valid_ether_addr ( hw_addr ) ) { in acpi_extract_mac()
124 eth_ntoa ( hw_addr ) ); in acpi_extract_mac()
140 int acpi_mac ( uint8_t *hw_addr ) { in acpi_mac() argument
144 if ( ( rc = acpi_extract ( AMAC_SIGNATURE, hw_addr, in acpi_mac()
149 if ( ( rc = acpi_extract ( MACA_SIGNATURE, hw_addr, in acpi_mac()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/net/ethernet/atheros/atlx/
H A Datl1.c264 ioread16(hw->hw_addr + REG_PHY_ENABLE); in atl1_reset_hw()
319 ioread32(hw->hw_addr + REG_VPD_CAP); in atl1_read_eeprom()
349 ioread32(hw->hw_addr + REG_MDIO_CTRL); in atl1_read_phy_reg()
597 ioread32(hw->hw_addr + REG_MDIO_CTRL); in atl1_write_phy_reg()
814 hw->hw_addr + REG_SPI_FLASH_OP_RDID); in atl1_init_flash_opcode()
1475 hw->hw_addr + REG_DESC_RFD_ADDR_LO); in atl1_configure()
1477 hw->hw_addr + REG_DESC_RRD_ADDR_LO); in atl1_configure()
1479 hw->hw_addr + REG_DESC_TPD_ADDR_LO); in atl1_configure()
1481 hw->hw_addr + REG_DESC_CMB_ADDR_LO); in atl1_configure()
1483 hw->hw_addr + REG_DESC_SMB_ADDR_LO); in atl1_configure()
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/net/ethernet/atheros/atlx/
H A Datl1.c264 ioread16(hw->hw_addr + REG_PHY_ENABLE); in atl1_reset_hw()
319 ioread32(hw->hw_addr + REG_VPD_CAP); in atl1_read_eeprom()
349 ioread32(hw->hw_addr + REG_MDIO_CTRL); in atl1_read_phy_reg()
597 ioread32(hw->hw_addr + REG_MDIO_CTRL); in atl1_write_phy_reg()
814 hw->hw_addr + REG_SPI_FLASH_OP_RDID); in atl1_init_flash_opcode()
1475 hw->hw_addr + REG_DESC_RFD_ADDR_LO); in atl1_configure()
1477 hw->hw_addr + REG_DESC_RRD_ADDR_LO); in atl1_configure()
1479 hw->hw_addr + REG_DESC_TPD_ADDR_LO); in atl1_configure()
1481 hw->hw_addr + REG_DESC_CMB_ADDR_LO); in atl1_configure()
1483 hw->hw_addr + REG_DESC_SMB_ADDR_LO); in atl1_configure()
[all …]
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/net/ethernet/atheros/atlx/
H A Datl1.c264 ioread16(hw->hw_addr + REG_PHY_ENABLE); in atl1_reset_hw()
319 ioread32(hw->hw_addr + REG_VPD_CAP); in atl1_read_eeprom()
349 ioread32(hw->hw_addr + REG_MDIO_CTRL); in atl1_read_phy_reg()
597 ioread32(hw->hw_addr + REG_MDIO_CTRL); in atl1_write_phy_reg()
814 hw->hw_addr + REG_SPI_FLASH_OP_RDID); in atl1_init_flash_opcode()
1475 hw->hw_addr + REG_DESC_RFD_ADDR_LO); in atl1_configure()
1477 hw->hw_addr + REG_DESC_RRD_ADDR_LO); in atl1_configure()
1479 hw->hw_addr + REG_DESC_TPD_ADDR_LO); in atl1_configure()
1481 hw->hw_addr + REG_DESC_CMB_ADDR_LO); in atl1_configure()
1483 hw->hw_addr + REG_DESC_SMB_ADDR_LO); in atl1_configure()
[all …]
/dports/emulators/qemu42/qemu-4.2.1/roms/ipxe/src/drivers/net/igbvf/
H A Digbvf_osdep.h77 writel((value), ((a)->hw_addr + reg)); } while (0)
79 #define E1000_READ_REG(a, reg) (readl((a)->hw_addr + reg))
82 writel((value), ((a)->hw_addr + reg + ((offset) << 2))); } while (0)
85 readl((a)->hw_addr + reg + ((offset) << 2)))
91 writew((value), ((a)->hw_addr + reg + ((offset) << 1))))
94 readw((a)->hw_addr + reg + ((offset) << 1)))
97 writeb((value), ((a)->hw_addr + reg + (offset))))
100 readb((a)->hw_addr + reg + (offset)))
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/ipxe/src/drivers/net/igbvf/
H A Digbvf_osdep.h77 writel((value), ((a)->hw_addr + reg)); } while (0)
79 #define E1000_READ_REG(a, reg) (readl((a)->hw_addr + reg))
82 writel((value), ((a)->hw_addr + reg + ((offset) << 2))); } while (0)
85 readl((a)->hw_addr + reg + ((offset) << 2)))
91 writew((value), ((a)->hw_addr + reg + ((offset) << 1))))
94 readw((a)->hw_addr + reg + ((offset) << 1)))
97 writeb((value), ((a)->hw_addr + reg + (offset))))
100 readb((a)->hw_addr + reg + (offset)))
/dports/emulators/qemu-utils/qemu-4.2.1/roms/ipxe/src/drivers/net/igbvf/
H A Digbvf_osdep.h77 writel((value), ((a)->hw_addr + reg)); } while (0)
79 #define E1000_READ_REG(a, reg) (readl((a)->hw_addr + reg))
82 writel((value), ((a)->hw_addr + reg + ((offset) << 2))); } while (0)
85 readl((a)->hw_addr + reg + ((offset) << 2)))
91 writew((value), ((a)->hw_addr + reg + ((offset) << 1))))
94 readw((a)->hw_addr + reg + ((offset) << 1)))
97 writeb((value), ((a)->hw_addr + reg + (offset))))
100 readb((a)->hw_addr + reg + (offset)))
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/ipxe/src/drivers/net/igbvf/
H A Digbvf_osdep.h77 writel((value), ((a)->hw_addr + reg)); } while (0)
79 #define E1000_READ_REG(a, reg) (readl((a)->hw_addr + reg))
82 writel((value), ((a)->hw_addr + reg + ((offset) << 2))); } while (0)
85 readl((a)->hw_addr + reg + ((offset) << 2)))
91 writew((value), ((a)->hw_addr + reg + ((offset) << 1))))
94 readw((a)->hw_addr + reg + ((offset) << 1)))
97 writeb((value), ((a)->hw_addr + reg + (offset))))
100 readb((a)->hw_addr + reg + (offset)))
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/net/ethernet/intel/e1000/
H A De1000_osdep.h29 (readl(hw->hw_addr + ((hw->mac_type >= e1000_82543) \
33 (writel((value), (hw->hw_addr + ((hw->mac_type >= e1000_82543) \
37 writel((value), ((a)->hw_addr + \
42 readl((a)->hw_addr + \
50 writew((value), ((a)->hw_addr + \
55 readw((a)->hw_addr + \
60 writeb((value), ((a)->hw_addr + \
65 readb((a)->hw_addr + \
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/net/ethernet/intel/e1000/
H A De1000_osdep.h29 (readl(hw->hw_addr + ((hw->mac_type >= e1000_82543) \
33 (writel((value), (hw->hw_addr + ((hw->mac_type >= e1000_82543) \
37 writel((value), ((a)->hw_addr + \
42 readl((a)->hw_addr + \
50 writew((value), ((a)->hw_addr + \
55 readw((a)->hw_addr + \
60 writeb((value), ((a)->hw_addr + \
65 readb((a)->hw_addr + \
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/net/ethernet/intel/e1000/
H A De1000_osdep.h29 (readl(hw->hw_addr + ((hw->mac_type >= e1000_82543) \
33 (writel((value), (hw->hw_addr + ((hw->mac_type >= e1000_82543) \
37 writel((value), ((a)->hw_addr + \
42 readl((a)->hw_addr + \
50 writew((value), ((a)->hw_addr + \
55 readw((a)->hw_addr + \
60 writeb((value), ((a)->hw_addr + \
65 readb((a)->hw_addr + \
/dports/emulators/qemu5/qemu-5.2.0/roms/ipxe/src/drivers/net/igbvf/
H A Digbvf_osdep.h77 writel((value), ((a)->hw_addr + reg)); } while (0)
79 #define E1000_READ_REG(a, reg) (readl((a)->hw_addr + reg))
82 writel((value), ((a)->hw_addr + reg + ((offset) << 2))); } while (0)
85 readl((a)->hw_addr + reg + ((offset) << 2)))
91 writew((value), ((a)->hw_addr + reg + ((offset) << 1))))
94 readw((a)->hw_addr + reg + ((offset) << 1)))
97 writeb((value), ((a)->hw_addr + reg + (offset))))
100 readb((a)->hw_addr + reg + (offset)))
/dports/net/ipxe/ipxe-2265a65/src/drivers/net/igbvf/
H A Digbvf_osdep.h77 writel((value), ((a)->hw_addr + reg)); } while (0)
79 #define E1000_READ_REG(a, reg) (readl((a)->hw_addr + reg))
82 writel((value), ((a)->hw_addr + reg + ((offset) << 2))); } while (0)
85 readl((a)->hw_addr + reg + ((offset) << 2)))
91 writew((value), ((a)->hw_addr + reg + ((offset) << 1))))
94 readw((a)->hw_addr + reg + ((offset) << 1)))
97 writeb((value), ((a)->hw_addr + reg + (offset))))
100 readb((a)->hw_addr + reg + (offset)))
/dports/emulators/qemu/qemu-6.2.0/roms/ipxe/src/drivers/net/igbvf/
H A Digbvf_osdep.h77 writel((value), ((a)->hw_addr + reg)); } while (0)
79 #define E1000_READ_REG(a, reg) (readl((a)->hw_addr + reg))
82 writel((value), ((a)->hw_addr + reg + ((offset) << 2))); } while (0)
85 readl((a)->hw_addr + reg + ((offset) << 2)))
91 writew((value), ((a)->hw_addr + reg + ((offset) << 1))))
94 readw((a)->hw_addr + reg + ((offset) << 1)))
97 writeb((value), ((a)->hw_addr + reg + (offset))))
100 readb((a)->hw_addr + reg + (offset)))
/dports/emulators/qemu60/qemu-6.0.0/roms/ipxe/src/drivers/net/igbvf/
H A Digbvf_osdep.h77 writel((value), ((a)->hw_addr + reg)); } while (0)
79 #define E1000_READ_REG(a, reg) (readl((a)->hw_addr + reg))
82 writel((value), ((a)->hw_addr + reg + ((offset) << 2))); } while (0)
85 readl((a)->hw_addr + reg + ((offset) << 2)))
91 writew((value), ((a)->hw_addr + reg + ((offset) << 1))))
94 readw((a)->hw_addr + reg + ((offset) << 1)))
97 writeb((value), ((a)->hw_addr + reg + (offset))))
100 readb((a)->hw_addr + reg + (offset)))

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