| /dports/sysutils/minipro/minipro-e6fb06822e6685886a045ae98c3c82d832bd8e9c/ |
| H A D | tl866a.c | 128 out_buf[11] = icsp; in msg_init()
149 msg_init(msg, TL866A_PROTECT_OFF, handle->device, handle->icsp); in tl866a_protect_off()
156 msg_init(msg, TL866A_PROTECT_ON, handle->device, handle->icsp); in tl866a_protect_on()
189 msg_init(msg, type, handle->device, handle->icsp); in tl866a_read_block()
207 msg_init(msg, type, handle->device, handle->icsp); in tl866a_write_block()
217 msg_init(msg, TL866A_GET_CHIP_ID, handle->device, handle->icsp); in tl866a_get_chip_id()
238 msg_init(msg, type, handle->device, handle->icsp); in tl866a_read_fuses()
263 msg_init(msg, type + 1, handle->device, handle->icsp); in tl866a_write_fuses()
273 msg_init(msg, type - 1, handle->device, handle->icsp); in tl866a_write_fuses()
281 msg_init(msg, type, handle->device, handle->icsp); in tl866a_write_fuses()
[all …]
|
| H A D | main.c | 52 uint8_t icsp; member
283 cmdopts.icsp = MP_ICSP_ENABLE | MP_ICSP_VCC; in parse_cmdline()
287 cmdopts.icsp = MP_ICSP_ENABLE; in parse_cmdline()
873 handle->icsp = cmdopts.icsp; in main()
|
| H A D | minipro.h | 110 uint32_t icsp; member
|
| H A D | tl866iiplus.md | 97 uint8_t icsp; // 0x03
|
| H A D | tl866iiplus.c | 23 buf[3] = handle->icsp; in msg_init()
|
| /dports/japanese/kinput2/kinput2-v3.1/lib/ |
| H A D | Atok.c | 1642 ICString *icsp; local
1765 bytes = (int)icsp->nbytes;
1766 chars = (int)icsp->nchars;
1773 icsp->attr = ICAttrNormalString;
1774 icsp++;
1780 icsp->attr = ICAttrNormalString;
1781 icsp->data = (char *)0;
1782 icsp++;
1793 bytes = (int)icsp->nbytes;
1794 chars = (int)icsp->nchars;
[all …]
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/skiboot/hw/ |
| H A D | npu.c | 1549 uint32_t icsp = get_ics_phandle(); in npu_add_phb_properties() local
1554 0x0000, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL0, 1, in npu_add_phb_properties()
1556 0x0000, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL1, 1, in npu_add_phb_properties()
1558 0x0800, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL2, 1, in npu_add_phb_properties()
1560 0x0800, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL3, 1, in npu_add_phb_properties()
1577 dt_add_property_cells(np, "interrupt-parent", icsp); in npu_add_phb_properties()
|
| H A D | npu2.c | 1930 uint32_t icsp = get_ics_phandle(); in npu2_add_interrupt_map() local
1951 map[i + 4] = icsp; /* interrupt-parent */ in npu2_add_interrupt_map()
1964 uint32_t icsp = get_ics_phandle(); in npu2_add_phb_properties() local
1979 dt_add_property_cells(np, "interrupt-parent", icsp); in npu2_add_phb_properties()
|
| H A D | phb3.c | 4539 uint32_t lsibase, icsp = get_ics_phandle(); in phb3_add_properties() local
4556 dt_add_property_cells(np, "interrupt-parent", icsp); in phb3_add_properties()
4615 p->phb.lstate.int_parent[0] = icsp; in phb3_add_properties()
4616 p->phb.lstate.int_parent[1] = icsp; in phb3_add_properties()
4617 p->phb.lstate.int_parent[2] = icsp; in phb3_add_properties()
4618 p->phb.lstate.int_parent[3] = icsp; in phb3_add_properties()
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/skiboot/hw/ |
| H A D | npu.c | 1549 uint32_t icsp = get_ics_phandle(); in npu_add_phb_properties() local
1554 0x0000, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL0, 1, in npu_add_phb_properties()
1556 0x0000, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL1, 1, in npu_add_phb_properties()
1558 0x0800, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL2, 1, in npu_add_phb_properties()
1560 0x0800, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL3, 1, in npu_add_phb_properties()
1577 dt_add_property_cells(np, "interrupt-parent", icsp); in npu_add_phb_properties()
|
| H A D | npu2.c | 1930 uint32_t icsp = get_ics_phandle(); in npu2_add_interrupt_map() local
1951 map[i + 4] = icsp; /* interrupt-parent */ in npu2_add_interrupt_map()
1964 uint32_t icsp = get_ics_phandle(); in npu2_add_phb_properties() local
1979 dt_add_property_cells(np, "interrupt-parent", icsp); in npu2_add_phb_properties()
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/skiboot/hw/ |
| H A D | npu.c | 1551 uint32_t icsp = get_ics_phandle(); in npu_add_phb_properties() local
1556 0x0000, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL0, 1, in npu_add_phb_properties()
1558 0x0000, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL1, 1, in npu_add_phb_properties()
1560 0x0800, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL2, 1, in npu_add_phb_properties()
1562 0x0800, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL3, 1, in npu_add_phb_properties()
1579 dt_add_property_cells(np, "interrupt-parent", icsp); in npu_add_phb_properties()
|
| H A D | p7ioc-phb.c | 2547 uint32_t lsibase, icsp = get_ics_phandle(); in p7ioc_pcie_add_node() local
2567 dt_add_property_cells(np, "interrupt-parent", icsp); in p7ioc_pcie_add_node()
2625 p->phb.lstate.int_parent[0] = icsp; in p7ioc_pcie_add_node()
2626 p->phb.lstate.int_parent[1] = icsp; in p7ioc_pcie_add_node()
2627 p->phb.lstate.int_parent[2] = icsp; in p7ioc_pcie_add_node()
2628 p->phb.lstate.int_parent[3] = icsp; in p7ioc_pcie_add_node()
|
| H A D | npu2.c | 1664 uint32_t icsp = get_ics_phandle(); in npu2_add_interrupt_map() local
1682 map[i + 4] = icsp; /* interrupt-parent */ in npu2_add_interrupt_map()
1695 uint32_t icsp = get_ics_phandle(); in npu2_add_phb_properties() local
1710 dt_add_property_cells(np, "interrupt-parent", icsp); in npu2_add_phb_properties()
|
| H A D | phb3.c | 4424 uint32_t lsibase, icsp = get_ics_phandle(); in phb3_add_properties() local
4441 dt_add_property_cells(np, "interrupt-parent", icsp); in phb3_add_properties()
4495 p->phb.lstate.int_parent[0] = icsp; in phb3_add_properties()
4496 p->phb.lstate.int_parent[1] = icsp; in phb3_add_properties()
4497 p->phb.lstate.int_parent[2] = icsp; in phb3_add_properties()
4498 p->phb.lstate.int_parent[3] = icsp; in phb3_add_properties()
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/skiboot/hw/ |
| H A D | npu.c | 1549 uint32_t icsp = get_ics_phandle(); in npu_add_phb_properties() local
1554 0x0000, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL0, 1, in npu_add_phb_properties()
1556 0x0000, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL1, 1, in npu_add_phb_properties()
1558 0x0800, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL2, 1, in npu_add_phb_properties()
1560 0x0800, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL3, 1, in npu_add_phb_properties()
1577 dt_add_property_cells(np, "interrupt-parent", icsp); in npu_add_phb_properties()
|
| H A D | npu2.c | 1930 uint32_t icsp = get_ics_phandle(); in npu2_add_interrupt_map() local
1951 map[i + 4] = icsp; /* interrupt-parent */ in npu2_add_interrupt_map()
1964 uint32_t icsp = get_ics_phandle(); in npu2_add_phb_properties() local
1979 dt_add_property_cells(np, "interrupt-parent", icsp); in npu2_add_phb_properties()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/skiboot/hw/ |
| H A D | npu.c | 1549 uint32_t icsp = get_ics_phandle();
1554 0x0000, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL0, 1,
1556 0x0000, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL1, 1,
1558 0x0800, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL2, 1,
1560 0x0800, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL3, 1,
1577 dt_add_property_cells(np, "interrupt-parent", icsp);
|
| H A D | npu2.c | 1930 uint32_t icsp = get_ics_phandle(); in npu2_add_interrupt_map() local
1951 map[i + 4] = icsp; /* interrupt-parent */ in npu2_add_interrupt_map()
1964 uint32_t icsp = get_ics_phandle(); in npu2_add_phb_properties() local
1979 dt_add_property_cells(np, "interrupt-parent", icsp); in npu2_add_phb_properties()
|
| /dports/emulators/qemu/qemu-6.2.0/roms/skiboot/hw/ |
| H A D | npu.c | 1543 uint32_t icsp = get_ics_phandle(); in npu_add_phb_properties() local
1548 0x0000, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL0, 1, in npu_add_phb_properties()
1550 0x0000, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL1, 1, in npu_add_phb_properties()
1552 0x0800, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL2, 1, in npu_add_phb_properties()
1554 0x0800, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL3, 1, in npu_add_phb_properties()
1571 dt_add_property_cells(np, "interrupt-parent", icsp); in npu_add_phb_properties()
|
| H A D | npu3-nvlink.c | 1428 uint32_t *map, icsp, i = 0; in npu3_dt_add_interrupts() local
1438 icsp = get_ics_phandle(); in npu3_dt_add_interrupts()
1445 map[i + 4] = icsp; /* interrupt-parent */ in npu3_dt_add_interrupts()
1451 dt_add_property_cells(dn, "interrupt-parent", icsp); in npu3_dt_add_interrupts()
|
| H A D | npu2.c | 1790 uint32_t icsp = get_ics_phandle(); in npu2_add_interrupt_map() local
1811 map[i + 4] = icsp; /* interrupt-parent */ in npu2_add_interrupt_map()
1824 uint32_t icsp = get_ics_phandle(); in npu2_add_phb_properties() local
1839 dt_add_property_cells(np, "interrupt-parent", icsp); in npu2_add_phb_properties()
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/skiboot/hw/ |
| H A D | npu.c | 1549 uint32_t icsp = get_ics_phandle(); in npu_add_phb_properties() local
1554 0x0000, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL0, 1, in npu_add_phb_properties()
1556 0x0000, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL1, 1, in npu_add_phb_properties()
1558 0x0800, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL2, 1, in npu_add_phb_properties()
1560 0x0800, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL3, 1, in npu_add_phb_properties()
1577 dt_add_property_cells(np, "interrupt-parent", icsp); in npu_add_phb_properties()
|
| H A D | npu2.c | 1930 uint32_t icsp = get_ics_phandle(); in npu2_add_interrupt_map() local
1951 map[i + 4] = icsp; /* interrupt-parent */ in npu2_add_interrupt_map()
1964 uint32_t icsp = get_ics_phandle(); in npu2_add_phb_properties() local
1979 dt_add_property_cells(np, "interrupt-parent", icsp); in npu2_add_phb_properties()
|
| /dports/cad/calculix-ccx/CalculiX/ccx_2.18/src/ |
| H A D | dealloc_cal.c | 24 void dealloc_cal(ITG *ncs_,ITG **icsp,ITG *mcs,double **csp, in dealloc_cal() argument
97 ics=*icsp;cs=*csp;tieset=*tiesetp;tietol=*tietolp;co=*cop;kon=*konp; in dealloc_cal()
206 *icsp=ics;*csp=cs;*tiesetp=tieset;*tietolp=tietol;*cop=co;*konp=kon; in dealloc_cal()
|