/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AMDGPU/ |
H A D | SILowerI1Copies.cpp | 91 bool isConstantLaneMask(unsigned Reg, bool &Val) const; 729 bool SILowerI1Copies::isConstantLaneMask(unsigned Reg, bool &Val) const { in isConstantLaneMask() function in SILowerI1Copies 810 bool PrevConstant = isConstantLaneMask(PrevReg, PrevVal); in buildMergeLaneMasks() 812 bool CurConstant = isConstantLaneMask(CurReg, CurVal); in buildMergeLaneMasks()
|
/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AMDGPU/ |
H A D | SILowerI1Copies.cpp | 83 bool isConstantLaneMask(unsigned Reg, bool &Val) const; 688 bool SILowerI1Copies::isConstantLaneMask(unsigned Reg, bool &Val) const { in isConstantLaneMask() function in SILowerI1Copies 769 bool PrevConstant = isConstantLaneMask(PrevReg, PrevVal); in buildMergeLaneMasks() 771 bool CurConstant = isConstantLaneMask(CurReg, CurVal); in buildMergeLaneMasks()
|
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AMDGPU/ |
H A D | SILowerI1Copies.cpp | 92 bool isConstantLaneMask(Register Reg, bool &Val) const; 741 bool SILowerI1Copies::isConstantLaneMask(Register Reg, bool &Val) const { in isConstantLaneMask() function in SILowerI1Copies 822 bool PrevConstant = isConstantLaneMask(PrevReg, PrevVal); in buildMergeLaneMasks() 824 bool CurConstant = isConstantLaneMask(CurReg, CurVal); in buildMergeLaneMasks()
|
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AMDGPU/ |
H A D | SILowerI1Copies.cpp | 92 bool isConstantLaneMask(unsigned Reg, bool &Val) const; 743 bool SILowerI1Copies::isConstantLaneMask(unsigned Reg, bool &Val) const { in isConstantLaneMask() function in SILowerI1Copies 824 bool PrevConstant = isConstantLaneMask(PrevReg, PrevVal); in buildMergeLaneMasks() 826 bool CurConstant = isConstantLaneMask(CurReg, CurVal); in buildMergeLaneMasks()
|
/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AMDGPU/ |
H A D | SILowerI1Copies.cpp | 92 bool isConstantLaneMask(unsigned Reg, bool &Val) const; 738 bool SILowerI1Copies::isConstantLaneMask(unsigned Reg, bool &Val) const { in isConstantLaneMask() function in SILowerI1Copies 819 bool PrevConstant = isConstantLaneMask(PrevReg, PrevVal); in buildMergeLaneMasks() 821 bool CurConstant = isConstantLaneMask(CurReg, CurVal); in buildMergeLaneMasks()
|
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | SILowerI1Copies.cpp | 85 bool isConstantLaneMask(Register Reg, bool &Val) const; 736 bool SILowerI1Copies::isConstantLaneMask(Register Reg, bool &Val) const { 820 bool PrevConstant = isConstantLaneMask(PrevReg, PrevVal); 822 bool CurConstant = isConstantLaneMask(CurReg, CurVal);
|
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AMDGPU/ |
H A D | SILowerI1Copies.cpp | 85 bool isConstantLaneMask(Register Reg, bool &Val) const; 736 bool SILowerI1Copies::isConstantLaneMask(Register Reg, bool &Val) const { in isConstantLaneMask() function in SILowerI1Copies 820 bool PrevConstant = isConstantLaneMask(PrevReg, PrevVal); in buildMergeLaneMasks() 822 bool CurConstant = isConstantLaneMask(CurReg, CurVal); in buildMergeLaneMasks()
|
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | SILowerI1Copies.cpp | 85 bool isConstantLaneMask(Register Reg, bool &Val) const; 731 bool SILowerI1Copies::isConstantLaneMask(Register Reg, bool &Val) const { in isConstantLaneMask() function in SILowerI1Copies 812 bool PrevConstant = isConstantLaneMask(PrevReg, PrevVal); in buildMergeLaneMasks() 814 bool CurConstant = isConstantLaneMask(CurReg, CurVal); in buildMergeLaneMasks()
|
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AMDGPU/ |
H A D | SILowerI1Copies.cpp | 92 bool isConstantLaneMask(unsigned Reg, bool &Val) const; 743 bool SILowerI1Copies::isConstantLaneMask(unsigned Reg, bool &Val) const { in isConstantLaneMask() function in SILowerI1Copies 824 bool PrevConstant = isConstantLaneMask(PrevReg, PrevVal); in buildMergeLaneMasks() 826 bool CurConstant = isConstantLaneMask(CurReg, CurVal); in buildMergeLaneMasks()
|
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SILowerI1Copies.cpp | 85 bool isConstantLaneMask(Register Reg, bool &Val) const; 736 bool SILowerI1Copies::isConstantLaneMask(Register Reg, bool &Val) const { in isConstantLaneMask() function in SILowerI1Copies 820 bool PrevConstant = isConstantLaneMask(PrevReg, PrevVal); in buildMergeLaneMasks() 822 bool CurConstant = isConstantLaneMask(CurReg, CurVal); in buildMergeLaneMasks()
|
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
H A D | SILowerI1Copies.cpp | 92 bool isConstantLaneMask(unsigned Reg, bool &Val) const; 738 bool SILowerI1Copies::isConstantLaneMask(unsigned Reg, bool &Val) const { in isConstantLaneMask() function in SILowerI1Copies 819 bool PrevConstant = isConstantLaneMask(PrevReg, PrevVal); in buildMergeLaneMasks() 821 bool CurConstant = isConstantLaneMask(CurReg, CurVal); in buildMergeLaneMasks()
|
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AMDGPU/ |
H A D | SILowerI1Copies.cpp | 85 bool isConstantLaneMask(Register Reg, bool &Val) const; 736 bool SILowerI1Copies::isConstantLaneMask(Register Reg, bool &Val) const { in isConstantLaneMask() function in SILowerI1Copies 820 bool PrevConstant = isConstantLaneMask(PrevReg, PrevVal); in buildMergeLaneMasks() 822 bool CurConstant = isConstantLaneMask(CurReg, CurVal); in buildMergeLaneMasks()
|
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | SILowerI1Copies.cpp | 85 bool isConstantLaneMask(Register Reg, bool &Val) const; 736 bool SILowerI1Copies::isConstantLaneMask(Register Reg, bool &Val) const { in isConstantLaneMask() function in SILowerI1Copies 820 bool PrevConstant = isConstantLaneMask(PrevReg, PrevVal); in buildMergeLaneMasks() 822 bool CurConstant = isConstantLaneMask(CurReg, CurVal); in buildMergeLaneMasks()
|
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SILowerI1Copies.cpp | 92 bool isConstantLaneMask(unsigned Reg, bool &Val) const; 738 bool SILowerI1Copies::isConstantLaneMask(unsigned Reg, bool &Val) const { in isConstantLaneMask() function in SILowerI1Copies 819 bool PrevConstant = isConstantLaneMask(PrevReg, PrevVal); in buildMergeLaneMasks() 821 bool CurConstant = isConstantLaneMask(CurReg, CurVal); in buildMergeLaneMasks()
|
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | SILowerI1Copies.cpp | 85 bool isConstantLaneMask(Register Reg, bool &Val) const; 731 bool SILowerI1Copies::isConstantLaneMask(Register Reg, bool &Val) const { in isConstantLaneMask() function in SILowerI1Copies 812 bool PrevConstant = isConstantLaneMask(PrevReg, PrevVal); in buildMergeLaneMasks() 814 bool CurConstant = isConstantLaneMask(CurReg, CurVal); in buildMergeLaneMasks()
|
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | SILowerI1Copies.cpp | 85 bool isConstantLaneMask(Register Reg, bool &Val) const; 736 bool SILowerI1Copies::isConstantLaneMask(Register Reg, bool &Val) const { 820 bool PrevConstant = isConstantLaneMask(PrevReg, PrevVal); 822 bool CurConstant = isConstantLaneMask(CurReg, CurVal);
|