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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/testsuite/sim/frv/
H A Dldsh.cgs1 # frv testcase for ldsh @($GRi,$GRj),$GRk
8 .global ldsh
9 ldsh:
14 ldsh @(sp,gr7),gr8
18 ldsh @(sp,gr7),gr8
24 ldsh @(sp,gr7),gr8
/dports/devel/avr-gdb/gdb-7.3.1/sim/testsuite/sim/frv/
H A Dldsh.cgs1 # frv testcase for ldsh @($GRi,$GRj),$GRk
8 .global ldsh
9 ldsh:
14 ldsh @(sp,gr7),gr8
18 ldsh @(sp,gr7),gr8
24 ldsh @(sp,gr7),gr8
/dports/devel/gdb761/gdb-7.6.1/sim/testsuite/sim/frv/
H A Dldsh.cgs1 # frv testcase for ldsh @($GRi,$GRj),$GRk
8 .global ldsh
9 ldsh:
14 ldsh @(sp,gr7),gr8
18 ldsh @(sp,gr7),gr8
24 ldsh @(sp,gr7),gr8
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/testsuite/sim/frv/
H A Dldsh.cgs1 # frv testcase for ldsh @($GRi,$GRj),$GRk
8 .global ldsh
9 ldsh:
14 ldsh @(sp,gr7),gr8
18 ldsh @(sp,gr7),gr8
24 ldsh @(sp,gr7),gr8
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/testsuite/sim/arm/thumb/
H A Dldsh.cgs1 # arm testcase for ldsh $rd,[$rb,$ro]
8 .global ldsh
9 ldsh:
10 ldsh r0,[r0,r0]
/dports/devel/avr-gdb/gdb-7.3.1/sim/testsuite/sim/arm/thumb/
H A Dldsh.cgs1 # arm testcase for ldsh $rd,[$rb,$ro]
8 .global ldsh
9 ldsh:
10 ldsh r0,[r0,r0]
/dports/devel/gdb761/gdb-7.6.1/sim/testsuite/sim/arm/thumb/
H A Dldsh.cgs1 # arm testcase for ldsh $rd,[$rb,$ro]
8 .global ldsh
9 ldsh:
10 ldsh r0,[r0,r0]
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/testsuite/sim/arm/thumb/
H A Dldsh.cgs1 # arm testcase for ldsh $rd,[$rb,$ro]
8 .global ldsh
9 ldsh:
10 ldsh r0,[r0,r0]
/dports/devel/capstone4/capstone-4.0.2/suite/MC/Sparc/
H A Dsparc-mem-instructions.s.cs5 0xd4,0x56,0x00,0x16 = ldsh [%i0+%l6], %o2
6 0xd4,0x56,0x20,0x20 = ldsh [%i0+32], %o2
7 0xd8,0x50,0x60,0x00 = ldsh [%g1], %o4
/dports/devel/capstone3/capstone-3.0.5/suite/MC/Sparc/
H A Dsparc-mem-instructions.s.cs5 0xd4,0x56,0x00,0x16 = ldsh [%i0+%l6], %o2
6 0xd4,0x56,0x20,0x20 = ldsh [%i0+32], %o2
7 0xd8,0x50,0x60,0x00 = ldsh [%g1], %o4
/dports/emulators/qemu42/qemu-4.2.1/capstone/suite/MC/Sparc/
H A Dsparc-mem-instructions.s.cs5 0xd4,0x56,0x00,0x16 = ldsh [%i0+%l6], %o2
6 0xd4,0x56,0x20,0x20 = ldsh [%i0+32], %o2
7 0xd8,0x50,0x60,0x00 = ldsh [%g1], %o4
/dports/emulators/qemu/qemu-6.2.0/capstone/suite/MC/Sparc/
H A Dsparc-mem-instructions.s.cs5 0xd4,0x56,0x00,0x16 = ldsh [%i0+%l6], %o2
6 0xd4,0x56,0x20,0x20 = ldsh [%i0+32], %o2
7 0xd8,0x50,0x60,0x00 = ldsh [%g1], %o4
/dports/emulators/qemu60/qemu-6.0.0/capstone/suite/MC/Sparc/
H A Dsparc-mem-instructions.s.cs5 0xd4,0x56,0x00,0x16 = ldsh [%i0+%l6], %o2
6 0xd4,0x56,0x20,0x20 = ldsh [%i0+32], %o2
7 0xd8,0x50,0x60,0x00 = ldsh [%g1], %o4
/dports/emulators/qemu-utils/qemu-4.2.1/capstone/suite/MC/Sparc/
H A Dsparc-mem-instructions.s.cs5 0xd4,0x56,0x00,0x16 = ldsh [%i0+%l6], %o2
6 0xd4,0x56,0x20,0x20 = ldsh [%i0+32], %o2
7 0xd8,0x50,0x60,0x00 = ldsh [%g1], %o4
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/capstone/suite/MC/Sparc/
H A Dsparc-mem-instructions.s.cs5 0xd4,0x56,0x00,0x16 = ldsh [%i0+%l6], %o2
6 0xd4,0x56,0x20,0x20 = ldsh [%i0+32], %o2
7 0xd8,0x50,0x60,0x00 = ldsh [%g1], %o4
/dports/emulators/qemu5/qemu-5.2.0/capstone/suite/MC/Sparc/
H A Dsparc-mem-instructions.s.cs5 0xd4,0x56,0x00,0x16 = ldsh [%i0+%l6], %o2
6 0xd4,0x56,0x20,0x20 = ldsh [%i0+32], %o2
7 0xd8,0x50,0x60,0x00 = ldsh [%g1], %o4
/dports/devel/redasm/REDasm-2.1.1/LibREDasm/depends/capstone/suite/MC/Sparc/
H A Dsparc-mem-instructions.s.cs5 0xd4,0x56,0x00,0x16 = ldsh [%i0+%l6], %o2
6 0xd4,0x56,0x20,0x20 = ldsh [%i0+32], %o2
7 0xd8,0x50,0x60,0x00 = ldsh [%g1], %o4
/dports/emulators/qemu-guest-agent/qemu-5.0.1/capstone/suite/MC/Sparc/
H A Dsparc-mem-instructions.s.cs5 0xd4,0x56,0x00,0x16 = ldsh [%i0+%l6], %o2
6 0xd4,0x56,0x20,0x20 = ldsh [%i0+32], %o2
7 0xd8,0x50,0x60,0x00 = ldsh [%g1], %o4
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/MC/Sparc/
H A Dsparc-mem-instructions.s13 ! CHECK: ldsh [%i0+%l6], %o2 ! encoding: [0xd4,0x56,0x00,0x16]
14 ldsh [%i0 + %l6], %o2
15 ! CHECK: ldsh [%i0+32], %o2 ! encoding: [0xd4,0x56,0x20,0x20]
16 ldsh [%i0 + 32], %o2
17 ! CHECK: ldsh [%g1], %o4 ! encoding: [0xd8,0x50,0x40,0x00]
18 ldsh [%g1], %o4
/dports/devel/llvm11/llvm-11.0.1.src/test/MC/Sparc/
H A Dsparc-mem-instructions.s13 ! CHECK: ldsh [%i0+%l6], %o2 ! encoding: [0xd4,0x56,0x00,0x16]
14 ldsh [%i0 + %l6], %o2
15 ! CHECK: ldsh [%i0+32], %o2 ! encoding: [0xd4,0x56,0x20,0x20]
16 ldsh [%i0 + 32], %o2
17 ! CHECK: ldsh [%g1], %o4 ! encoding: [0xd8,0x50,0x40,0x00]
18 ldsh [%g1], %o4
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/MC/Sparc/
H A Dsparc-mem-instructions.s13 ! CHECK: ldsh [%i0+%l6], %o2 ! encoding: [0xd4,0x56,0x00,0x16]
14 ldsh [%i0 + %l6], %o2
15 ! CHECK: ldsh [%i0+32], %o2 ! encoding: [0xd4,0x56,0x20,0x20]
16 ldsh [%i0 + 32], %o2
17 ! CHECK: ldsh [%g1], %o4 ! encoding: [0xd8,0x50,0x40,0x00]
18 ldsh [%g1], %o4
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/MC/Sparc/
H A Dsparc-mem-instructions.s13 ! CHECK: ldsh [%i0+%l6], %o2 ! encoding: [0xd4,0x56,0x00,0x16]
14 ldsh [%i0 + %l6], %o2
15 ! CHECK: ldsh [%i0+32], %o2 ! encoding: [0xd4,0x56,0x20,0x20]
16 ldsh [%i0 + 32], %o2
17 ! CHECK: ldsh [%g1], %o4 ! encoding: [0xd8,0x50,0x40,0x00]
18 ldsh [%g1], %o4
/dports/devel/llvm10/llvm-10.0.1.src/test/MC/Sparc/
H A Dsparc-mem-instructions.s13 ! CHECK: ldsh [%i0+%l6], %o2 ! encoding: [0xd4,0x56,0x00,0x16]
14 ldsh [%i0 + %l6], %o2
15 ! CHECK: ldsh [%i0+32], %o2 ! encoding: [0xd4,0x56,0x20,0x20]
16 ldsh [%i0 + 32], %o2
17 ! CHECK: ldsh [%g1], %o4 ! encoding: [0xd8,0x50,0x40,0x00]
18 ldsh [%g1], %o4
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/MC/Sparc/
H A Dsparc-mem-instructions.s13 ! CHECK: ldsh [%i0+%l6], %o2 ! encoding: [0xd4,0x56,0x00,0x16]
14 ldsh [%i0 + %l6], %o2
15 ! CHECK: ldsh [%i0+32], %o2 ! encoding: [0xd4,0x56,0x20,0x20]
16 ldsh [%i0 + 32], %o2
17 ! CHECK: ldsh [%g1], %o4 ! encoding: [0xd8,0x50,0x40,0x00]
18 ldsh [%g1], %o4
/dports/devel/llvm90/llvm-9.0.1.src/test/MC/Sparc/
H A Dsparc-mem-instructions.s13 ! CHECK: ldsh [%i0+%l6], %o2 ! encoding: [0xd4,0x56,0x00,0x16]
14 ldsh [%i0 + %l6], %o2
15 ! CHECK: ldsh [%i0+32], %o2 ! encoding: [0xd4,0x56,0x20,0x20]
16 ldsh [%i0 + 32], %o2
17 ! CHECK: ldsh [%g1], %o4 ! encoding: [0xd8,0x50,0x40,0x00]
18 ldsh [%g1], %o4

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