| /dports/java/openjdk8/jdk8u-jdk8u312-b07.1/hotspot/src/cpu/sparc/vm/ |
| H A D | macroAssembler_sparc.inline.hpp | 562 inline void MacroAssembler::ld( Register s1, Register s2, Register d) { ldsw( s1, s2, d); } in ld()
563 inline void MacroAssembler::ld( Register s1, int simm13a, Register d) { ldsw( s1, simm13a, d)… in ld()
572 inline void MacroAssembler::ld(Register s1, ByteSize simm13a, Register d) { ldsw( s1, in_bytes(simm… in ld()
591 inline void MacroAssembler::ldsw(const Address& a, Register d, int offset) { in ldsw() function in MacroAssembler
592 if (a.has_index()) { assert(offset == 0, ""); ldsw(a.base(), a.index(), d); } in ldsw()
593 else { ldsw(a.base(), a.disp() + offset, d); } in ldsw()
621 inline void MacroAssembler::ldsw(Register s1, RegisterOrConstant s2, Register d) { ldsw(Address(s1,… in ldsw() function in MacroAssembler
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| H A D | nativeInst_sparc.cpp | 618 a->ldsw( G5, al1.low10(), G4 ); idx++; in test()
620 a->ldsw( G5, I3, G4 ); idx++; in test()
762 a->ldsw( G5, al.low10(), G4); idx++; in test()
764 a->ldsw( G5, I3, G4 ); idx++; in test()
936 a->ldsw(G0, 0, O7); // "ld" must agree with code in the signal handler in patch_verified_entry()
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| /dports/java/openjdk8-jre/jdk8u-jdk8u312-b07.1/hotspot/src/cpu/sparc/vm/ |
| H A D | macroAssembler_sparc.inline.hpp | 562 inline void MacroAssembler::ld( Register s1, Register s2, Register d) { ldsw( s1, s2, d); } in ld()
563 inline void MacroAssembler::ld( Register s1, int simm13a, Register d) { ldsw( s1, simm13a, d)… in ld()
572 inline void MacroAssembler::ld(Register s1, ByteSize simm13a, Register d) { ldsw( s1, in_bytes(simm… in ld()
591 inline void MacroAssembler::ldsw(const Address& a, Register d, int offset) { in ldsw() function in MacroAssembler
592 if (a.has_index()) { assert(offset == 0, ""); ldsw(a.base(), a.index(), d); } in ldsw()
593 else { ldsw(a.base(), a.disp() + offset, d); } in ldsw()
621 inline void MacroAssembler::ldsw(Register s1, RegisterOrConstant s2, Register d) { ldsw(Address(s1,… in ldsw() function in MacroAssembler
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| H A D | nativeInst_sparc.cpp | 618 a->ldsw( G5, al1.low10(), G4 ); idx++; in test()
620 a->ldsw( G5, I3, G4 ); idx++; in test()
762 a->ldsw( G5, al.low10(), G4); idx++; in test()
764 a->ldsw( G5, I3, G4 ); idx++; in test()
936 a->ldsw(G0, 0, O7); // "ld" must agree with code in the signal handler in patch_verified_entry()
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| /dports/java/openjdk11/jdk11u-jdk-11.0.13-8-1/src/hotspot/cpu/sparc/ |
| H A D | macroAssembler_sparc.inline.hpp | 538 inline void MacroAssembler::ld( Register s1, Register s2, Register d) { ldsw( s1, s2, d); } in ld()
539 inline void MacroAssembler::ld( Register s1, int simm13a, Register d) { ldsw( s1, simm13a, d)… in ld()
543 inline void MacroAssembler::ld(Register s1, ByteSize simm13a, Register d) { ldsw( s1, in_bytes(simm… in ld()
559 inline void MacroAssembler::ldsw(const Address& a, Register d, int offset) { in ldsw() function in MacroAssembler
560 if (a.has_index()) { assert(offset == 0, ""); ldsw(a.base(), a.index(), d); } in ldsw()
561 else { ldsw(a.base(), a.disp() + offset, d); } in ldsw()
589 inline void MacroAssembler::ldsw(Register s1, RegisterOrConstant s2, Register d) { ldsw(Address(s1,… in ldsw() function in MacroAssembler
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| /dports/java/openjdk13/jdk13u-jdk-13.0.10-1-1/src/hotspot/cpu/sparc/ |
| H A D | macroAssembler_sparc.inline.hpp | 538 inline void MacroAssembler::ld( Register s1, Register s2, Register d) { ldsw( s1, s2, d); } in ld()
539 inline void MacroAssembler::ld( Register s1, int simm13a, Register d) { ldsw( s1, simm13a, d)… in ld()
543 inline void MacroAssembler::ld(Register s1, ByteSize simm13a, Register d) { ldsw( s1, in_bytes(simm… in ld()
559 inline void MacroAssembler::ldsw(const Address& a, Register d, int offset) { in ldsw() function in MacroAssembler
560 if (a.has_index()) { assert(offset == 0, ""); ldsw(a.base(), a.index(), d); } in ldsw()
561 else { ldsw(a.base(), a.disp() + offset, d); } in ldsw()
589 inline void MacroAssembler::ldsw(Register s1, RegisterOrConstant s2, Register d) { ldsw(Address(s1,… in ldsw() function in MacroAssembler
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| /dports/java/openjdk11-jre/jdk11u-jdk-11.0.13-8-1/src/hotspot/cpu/sparc/ |
| H A D | macroAssembler_sparc.inline.hpp | 538 inline void MacroAssembler::ld( Register s1, Register s2, Register d) { ldsw( s1, s2, d); } in ld()
539 inline void MacroAssembler::ld( Register s1, int simm13a, Register d) { ldsw( s1, simm13a, d)… in ld()
543 inline void MacroAssembler::ld(Register s1, ByteSize simm13a, Register d) { ldsw( s1, in_bytes(simm… in ld()
559 inline void MacroAssembler::ldsw(const Address& a, Register d, int offset) { in ldsw() function in MacroAssembler
560 if (a.has_index()) { assert(offset == 0, ""); ldsw(a.base(), a.index(), d); } in ldsw()
561 else { ldsw(a.base(), a.disp() + offset, d); } in ldsw()
589 inline void MacroAssembler::ldsw(Register s1, RegisterOrConstant s2, Register d) { ldsw(Address(s1,… in ldsw() function in MacroAssembler
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| /dports/java/openjdk12/openjdk-jdk12u-jdk-12.0.2-10-4/src/hotspot/cpu/sparc/ |
| H A D | macroAssembler_sparc.inline.hpp | 538 inline void MacroAssembler::ld( Register s1, Register s2, Register d) { ldsw( s1, s2, d); } in ld()
539 inline void MacroAssembler::ld( Register s1, int simm13a, Register d) { ldsw( s1, simm13a, d)… in ld()
543 inline void MacroAssembler::ld(Register s1, ByteSize simm13a, Register d) { ldsw( s1, in_bytes(simm… in ld()
559 inline void MacroAssembler::ldsw(const Address& a, Register d, int offset) { in ldsw() function in MacroAssembler
560 if (a.has_index()) { assert(offset == 0, ""); ldsw(a.base(), a.index(), d); } in ldsw()
561 else { ldsw(a.base(), a.disp() + offset, d); } in ldsw()
589 inline void MacroAssembler::ldsw(Register s1, RegisterOrConstant s2, Register d) { ldsw(Address(s1,… in ldsw() function in MacroAssembler
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| /dports/java/openjdk14/jdk14u-jdk-14.0.2-12-1/src/hotspot/cpu/sparc/ |
| H A D | macroAssembler_sparc.inline.hpp | 531 inline void MacroAssembler::ld( Register s1, Register s2, Register d) { ldsw( s1, s2, d); } in ld()
532 inline void MacroAssembler::ld( Register s1, int simm13a, Register d) { ldsw( s1, simm13a, d)… in ld()
536 inline void MacroAssembler::ld(Register s1, ByteSize simm13a, Register d) { ldsw( s1, in_bytes(simm… in ld()
552 inline void MacroAssembler::ldsw(const Address& a, Register d, int offset) { in ldsw() function in MacroAssembler
553 if (a.has_index()) { assert(offset == 0, ""); ldsw(a.base(), a.index(), d); } in ldsw()
554 else { ldsw(a.base(), a.disp() + offset, d); } in ldsw()
582 inline void MacroAssembler::ldsw(Register s1, RegisterOrConstant s2, Register d) { ldsw(Address(s1,… in ldsw() function in MacroAssembler
|
| /dports/biology/ugene/ugene-40.1/src/corelibs/U2Lang/src/support/serialize/ |
| H A D | HRWizardSerializer.h | 129 virtual void visit(UrlAndDatasetWidget *ldsw);
186 virtual void visit(UrlAndDatasetWidget *ldsw);
|
| /dports/misc/rump/buildrump.sh-b914579/src/sys/arch/sparc64/include/ |
| H A D | asm.h | 42 #define LDLNG ldsw
|
| /dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/ |
| H A D | softmmu_exec.h | 127 #define ldsw(p) ldsw_data(p) macro
|
| /dports/emulators/qemu42/qemu-4.2.1/include/exec/ |
| H A D | translator.h | 199 GEN_TRANSLATOR_LD(translator_ldsw, ldsw, int16_t, 1, bswap16)
|
| /dports/emulators/qemu-utils/qemu-4.2.1/include/exec/ |
| H A D | translator.h | 199 GEN_TRANSLATOR_LD(translator_ldsw, ldsw, int16_t, 1, bswap16)
|
| /dports/editors/fpc-ide/fpc-3.2.2/compiler/sparcgen/ |
| H A D | strinst.inc | 14 'ldub','lduh','ld','ldd','ld','ldfsr','ldd','ldc','ldcsr','lddc','ldx','lduw','ldsw',
|
| /dports/lang/fpc/fpc-3.2.2/compiler/sparcgen/ |
| H A D | strinst.inc | 14 'ldub','lduh','ld','ldd','ld','ldfsr','ldd','ldc','ldcsr','lddc','ldx','lduw','ldsw',
|
| /dports/lang/fpc-source/fpc-3.2.2/compiler/sparcgen/ |
| H A D | strinst.inc | 14 'ldub','lduh','ld','ldd','ld','ldfsr','ldd','ldc','ldcsr','lddc','ldx','lduw','ldsw',
|
| /dports/emulators/py-unicorn/unicorn-1.0.2/qemu/include/exec/ |
| H A D | cpu_ldst.h | 88 #define ldsw(p) ldsw_raw(p) macro
317 #define ldsw(p) ldsw_data(p) macro
|
| /dports/emulators/unicorn/unicorn-1.0.2/qemu/include/exec/ |
| H A D | cpu_ldst.h | 88 #define ldsw(p) ldsw_raw(p) macro
317 #define ldsw(p) ldsw_data(p) macro
|
| /dports/math/maxima/maxima-5.43.2/share/diffequations/ |
| H A D | pdvtr.mac | 63 ldf6(i):=block([],if ldsw[6,1]#y then (ldsw[6,i]:y,
|
| /dports/devel/binutils/binutils-2.37/ld/testsuite/ld-sparc/ |
| H A D | tlssunbin64.s | 60 ldsw [%g7 + %l2], %l2, %tie_add(bl8)
|
| /dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/ld/testsuite/ld-sparc/ |
| H A D | tlssunbin64.s | 60 ldsw [%g7 + %l2], %l2, %tie_add(bl8)
|
| /dports/lang/gnatdroid-binutils-x86/binutils-2.27/ld/testsuite/ld-sparc/ |
| H A D | tlssunbin64.s | 60 ldsw [%g7 + %l2], %l2, %tie_add(bl8)
|
| /dports/devel/arm-elf-binutils/binutils-2.37/ld/testsuite/ld-sparc/ |
| H A D | tlssunbin64.s | 60 ldsw [%g7 + %l2], %l2, %tie_add(bl8)
|
| /dports/lang/gnatdroid-binutils/binutils-2.27/ld/testsuite/ld-sparc/ |
| H A D | tlssunbin64.s | 60 ldsw [%g7 + %l2], %l2, %tie_add(bl8)
|