/dports/emulators/mess/mame-mame0226/src/devices/machine/ |
H A D | s3520cf.cpp | 57 if ((m_rtc.sec & 0x0f) >= 0x0a) { m_rtc.sec += 0x10; m_rtc.sec &= 0xf0; } in check_overflow() 58 if ((m_rtc.sec & 0xf0) >= 0x60) { m_rtc.min++; m_rtc.sec = 0; } in check_overflow() 59 if ((m_rtc.min & 0x0f) >= 0x0a) { m_rtc.min += 0x10; m_rtc.min &= 0xf0; } in check_overflow() 60 if ((m_rtc.min & 0xf0) >= 0x60) { m_rtc.hour++; m_rtc.min = 0; } in check_overflow() 62 if ((m_rtc.hour & 0xff) >= 0x24) { m_rtc.day++; m_rtc.wday++; m_rtc.hour = 0; } in check_overflow() 63 if (m_rtc.wday >= 7) { m_rtc.wday = 0; } in check_overflow() 64 if ((m_rtc.day & 0x0f) >= 0x0a) { m_rtc.day += 0x10; m_rtc.day &= 0xf0; } in check_overflow() 73 m_rtc.month++; m_rtc.day = 0x01; in check_overflow() 78 if (m_rtc.month >= 0x13) { m_rtc.year++; m_rtc.month = 1; } in check_overflow() 240 m_rtc.wday = m_rtc.hour = m_rtc.min = m_rtc.sec = 0; in rtc_write() [all …]
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H A D | rtc9701.cpp | 55 if((m_rtc.sec & 0x0f) >= 0x0a) { m_rtc.sec+=0x10; m_rtc.sec&=0xf0; } in TIMER_CALLBACK_MEMBER() 56 if((m_rtc.sec & 0xf0) >= 0x60) { m_rtc.min++; m_rtc.sec = 0; } in TIMER_CALLBACK_MEMBER() 57 if((m_rtc.min & 0x0f) >= 0x0a) { m_rtc.min+=0x10; m_rtc.min&=0xf0; } in TIMER_CALLBACK_MEMBER() 58 if((m_rtc.min & 0xf0) >= 0x60) { m_rtc.hour++; m_rtc.min = 0; } in TIMER_CALLBACK_MEMBER() 59 if((m_rtc.hour & 0x0f) >= 0x0a) { m_rtc.hour+=0x10; m_rtc.hour&=0xf0; } in TIMER_CALLBACK_MEMBER() 60 if((m_rtc.hour & 0xff) >= 0x24) { m_rtc.day++; m_rtc.wday<<=1; m_rtc.hour = 0; } in TIMER_CALLBACK_MEMBER() 62 if((m_rtc.day & 0x0f) >= 0x0a) { m_rtc.day+=0x10; m_rtc.day&=0xf0; } in TIMER_CALLBACK_MEMBER() 70 { m_rtc.month++; m_rtc.day = 0x01; } in TIMER_CALLBACK_MEMBER() 72 else if((m_rtc.day & 0xff) >= dpm[dpm_count]+1){ m_rtc.month++; m_rtc.day = 0x01; } in TIMER_CALLBACK_MEMBER() 74 if(m_rtc.month >= 0x13) { m_rtc.year++; m_rtc.month = 1; } in TIMER_CALLBACK_MEMBER() [all …]
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H A D | v3021.cpp | 317 m_ram[0x2] = m_rtc.sec; in copy_clock_to_ram() 318 m_ram[0x3] = m_rtc.min; in copy_clock_to_ram() 319 m_ram[0x4] = m_rtc.hour; in copy_clock_to_ram() 320 m_ram[0x5] = m_rtc.day; in copy_clock_to_ram() 322 m_ram[0x7] = m_rtc.year; in copy_clock_to_ram() 324 m_ram[0x9] = m_rtc.wnum; in copy_clock_to_ram() 335 m_rtc.sec = m_ram[0x2]; in copy_ram_to_clock() 336 m_rtc.min = m_ram[0x3]; in copy_ram_to_clock() 338 m_rtc.day = m_ram[0x5]; in copy_ram_to_clock() 343 set_time(true, bcd_to_integer(m_rtc.year), bcd_to_integer(m_rtc.month), bcd_to_integer(m_rtc.day), in copy_ram_to_clock() [all …]
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/dports/emulators/mame/mame-mame0226/src/devices/machine/ |
H A D | s3520cf.cpp | 57 if ((m_rtc.sec & 0x0f) >= 0x0a) { m_rtc.sec += 0x10; m_rtc.sec &= 0xf0; } in check_overflow() 58 if ((m_rtc.sec & 0xf0) >= 0x60) { m_rtc.min++; m_rtc.sec = 0; } in check_overflow() 59 if ((m_rtc.min & 0x0f) >= 0x0a) { m_rtc.min += 0x10; m_rtc.min &= 0xf0; } in check_overflow() 60 if ((m_rtc.min & 0xf0) >= 0x60) { m_rtc.hour++; m_rtc.min = 0; } in check_overflow() 62 if ((m_rtc.hour & 0xff) >= 0x24) { m_rtc.day++; m_rtc.wday++; m_rtc.hour = 0; } in check_overflow() 63 if (m_rtc.wday >= 7) { m_rtc.wday = 0; } in check_overflow() 64 if ((m_rtc.day & 0x0f) >= 0x0a) { m_rtc.day += 0x10; m_rtc.day &= 0xf0; } in check_overflow() 73 m_rtc.month++; m_rtc.day = 0x01; in check_overflow() 78 if (m_rtc.month >= 0x13) { m_rtc.year++; m_rtc.month = 1; } in check_overflow() 240 m_rtc.wday = m_rtc.hour = m_rtc.min = m_rtc.sec = 0; in rtc_write() [all …]
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H A D | rtc9701.cpp | 55 if((m_rtc.sec & 0x0f) >= 0x0a) { m_rtc.sec+=0x10; m_rtc.sec&=0xf0; } in TIMER_CALLBACK_MEMBER() 56 if((m_rtc.sec & 0xf0) >= 0x60) { m_rtc.min++; m_rtc.sec = 0; } in TIMER_CALLBACK_MEMBER() 57 if((m_rtc.min & 0x0f) >= 0x0a) { m_rtc.min+=0x10; m_rtc.min&=0xf0; } in TIMER_CALLBACK_MEMBER() 58 if((m_rtc.min & 0xf0) >= 0x60) { m_rtc.hour++; m_rtc.min = 0; } in TIMER_CALLBACK_MEMBER() 59 if((m_rtc.hour & 0x0f) >= 0x0a) { m_rtc.hour+=0x10; m_rtc.hour&=0xf0; } in TIMER_CALLBACK_MEMBER() 60 if((m_rtc.hour & 0xff) >= 0x24) { m_rtc.day++; m_rtc.wday<<=1; m_rtc.hour = 0; } in TIMER_CALLBACK_MEMBER() 62 if((m_rtc.day & 0x0f) >= 0x0a) { m_rtc.day+=0x10; m_rtc.day&=0xf0; } in TIMER_CALLBACK_MEMBER() 70 { m_rtc.month++; m_rtc.day = 0x01; } in TIMER_CALLBACK_MEMBER() 72 else if((m_rtc.day & 0xff) >= dpm[dpm_count]+1){ m_rtc.month++; m_rtc.day = 0x01; } in TIMER_CALLBACK_MEMBER() 74 if(m_rtc.month >= 0x13) { m_rtc.year++; m_rtc.month = 1; } in TIMER_CALLBACK_MEMBER() [all …]
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H A D | v3021.cpp | 317 m_ram[0x2] = m_rtc.sec; in copy_clock_to_ram() 318 m_ram[0x3] = m_rtc.min; in copy_clock_to_ram() 319 m_ram[0x4] = m_rtc.hour; in copy_clock_to_ram() 320 m_ram[0x5] = m_rtc.day; in copy_clock_to_ram() 322 m_ram[0x7] = m_rtc.year; in copy_clock_to_ram() 324 m_ram[0x9] = m_rtc.wnum; in copy_clock_to_ram() 335 m_rtc.sec = m_ram[0x2]; in copy_ram_to_clock() 336 m_rtc.min = m_ram[0x3]; in copy_ram_to_clock() 338 m_rtc.day = m_ram[0x5]; in copy_ram_to_clock() 343 set_time(true, bcd_to_integer(m_rtc.year), bcd_to_integer(m_rtc.month), bcd_to_integer(m_rtc.day), in copy_ram_to_clock() [all …]
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/dports/emulators/mess/mame-mame0226/src/mame/drivers/ |
H A D | lms46.cpp | 21 , m_rtc(*this, "rtc") in lms46_state() 43 m_rtc->cs_w(1); in rtc_r() 44 m_rtc->read_w(1); in rtc_r() 45 m_rtc->address_w(offset); in rtc_r() 47 m_rtc->read_w(0); in rtc_r() 48 m_rtc->cs_w(0); in rtc_r() 54 m_rtc->cs_w(1); in rtc_w() 55 m_rtc->address_w(offset); in rtc_w() 57 m_rtc->write_w(1); in rtc_w() 58 m_rtc->write_w(0); in rtc_w() [all …]
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H A D | micro20.cpp | 39 m_rtc(*this, RTC_TAG) in micro20_state() 50 required_device<msm58321_device> m_rtc; member in micro20_state 115 m_rtc->d0_w((data & 1) ? ASSERT_LINE : CLEAR_LINE); in portb_w() 116 m_rtc->d1_w((data & 2) ? ASSERT_LINE : CLEAR_LINE); in portb_w() 117 m_rtc->d2_w((data & 4) ? ASSERT_LINE : CLEAR_LINE); in portb_w() 118 m_rtc->d3_w((data & 8) ? ASSERT_LINE : CLEAR_LINE); in portb_w() 125 m_rtc->cs1_w(ASSERT_LINE); in portc_w() 126 m_rtc->cs2_w(ASSERT_LINE); in portc_w() 127 m_rtc->stop_w((data & 1) ? ASSERT_LINE : CLEAR_LINE); in portc_w() 190 MSM58321(config, m_rtc, 32768_Hz_XTAL); in micro20() [all …]
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H A D | duet16.cpp | 37 m_rtc(*this, "rtc"), in duet16_state() 93 m_rtc->cs1_w(ASSERT_LINE); in machine_reset() 281 m_rtc->cs2_w(ASSERT_LINE); in rtc_r() 284 m_rtc->read_w(CLEAR_LINE); in rtc_r() 285 m_rtc->cs2_w(CLEAR_LINE); in rtc_r() 291 m_rtc->d0_w(BIT(data, 0)); in rtc_w() 292 m_rtc->d1_w(BIT(data, 1)); in rtc_w() 293 m_rtc->d2_w(BIT(data, 2)); in rtc_w() 298 m_rtc->cs2_w(CLEAR_LINE); in rtc_w() 318 m_rtc->cs2_w(CLEAR_LINE); in rtc_addr_w() [all …]
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H A D | textelcomp.cpp | 26 , m_rtc(*this, "rtc") in textelcomp_state() 65 m_rtc->cs1_w(1); in machine_start() 119 m_rtc->write_w(0); in rtc_w() 121 m_rtc->read_w(0); in rtc_w() 123 m_rtc->address_write_w(0); in rtc_w() 125 m_rtc->d0_w(BIT(data, 0)); in rtc_w() 126 m_rtc->d1_w(BIT(data, 1)); in rtc_w() 127 m_rtc->d2_w(BIT(data, 2)); in rtc_w() 128 m_rtc->d3_w(BIT(data, 3)); in rtc_w() 131 m_rtc->write_w(1); in rtc_w() [all …]
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/dports/emulators/mame/mame-mame0226/src/mame/drivers/ |
H A D | lms46.cpp | 21 , m_rtc(*this, "rtc") in lms46_state() 43 m_rtc->cs_w(1); in rtc_r() 44 m_rtc->read_w(1); in rtc_r() 45 m_rtc->address_w(offset); in rtc_r() 47 m_rtc->read_w(0); in rtc_r() 48 m_rtc->cs_w(0); in rtc_r() 54 m_rtc->cs_w(1); in rtc_w() 55 m_rtc->address_w(offset); in rtc_w() 57 m_rtc->write_w(1); in rtc_w() 58 m_rtc->write_w(0); in rtc_w() [all …]
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H A D | micro20.cpp | 39 m_rtc(*this, RTC_TAG) in micro20_state() 50 required_device<msm58321_device> m_rtc; member in micro20_state 115 m_rtc->d0_w((data & 1) ? ASSERT_LINE : CLEAR_LINE); in portb_w() 116 m_rtc->d1_w((data & 2) ? ASSERT_LINE : CLEAR_LINE); in portb_w() 117 m_rtc->d2_w((data & 4) ? ASSERT_LINE : CLEAR_LINE); in portb_w() 118 m_rtc->d3_w((data & 8) ? ASSERT_LINE : CLEAR_LINE); in portb_w() 125 m_rtc->cs1_w(ASSERT_LINE); in portc_w() 126 m_rtc->cs2_w(ASSERT_LINE); in portc_w() 127 m_rtc->stop_w((data & 1) ? ASSERT_LINE : CLEAR_LINE); in portc_w() 190 MSM58321(config, m_rtc, 32768_Hz_XTAL); in micro20() [all …]
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H A D | duet16.cpp | 37 m_rtc(*this, "rtc"), in duet16_state() 93 m_rtc->cs1_w(ASSERT_LINE); in machine_reset() 281 m_rtc->cs2_w(ASSERT_LINE); in rtc_r() 284 m_rtc->read_w(CLEAR_LINE); in rtc_r() 285 m_rtc->cs2_w(CLEAR_LINE); in rtc_r() 291 m_rtc->d0_w(BIT(data, 0)); in rtc_w() 292 m_rtc->d1_w(BIT(data, 1)); in rtc_w() 293 m_rtc->d2_w(BIT(data, 2)); in rtc_w() 298 m_rtc->cs2_w(CLEAR_LINE); in rtc_w() 318 m_rtc->cs2_w(CLEAR_LINE); in rtc_addr_w() [all …]
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H A D | textelcomp.cpp | 26 , m_rtc(*this, "rtc") in textelcomp_state() 65 m_rtc->cs1_w(1); in machine_start() 119 m_rtc->write_w(0); in rtc_w() 121 m_rtc->read_w(0); in rtc_w() 123 m_rtc->address_write_w(0); in rtc_w() 125 m_rtc->d0_w(BIT(data, 0)); in rtc_w() 126 m_rtc->d1_w(BIT(data, 1)); in rtc_w() 127 m_rtc->d2_w(BIT(data, 2)); in rtc_w() 128 m_rtc->d3_w(BIT(data, 3)); in rtc_w() 131 m_rtc->write_w(1); in rtc_w() [all …]
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/dports/emulators/mess/mame-mame0226/src/devices/bus/bbc/rom/ |
H A D | rtc.cpp | 37 DS1315(config, m_rtc, 0); in device_add_mconfig() 51 , m_rtc(*this, "rtc") in bbc_stlrtc_device() 58 , m_rtc(*this, "rtc") in bbc_pmsrtc_device() 85 data = m_rtc->read(1); in read() 89 m_rtc->write(0, data); in read() 93 data = m_rtc->read(0); in read() 100 m_rtc->write(1, data); in read() 113 data |= m_rtc->read_0(); in read() 116 data |= m_rtc->read_1(); in read() 119 if (m_rtc->chip_enable()) in read() [all …]
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/dports/emulators/mame/mame-mame0226/src/devices/bus/bbc/rom/ |
H A D | rtc.cpp | 37 DS1315(config, m_rtc, 0); in device_add_mconfig() 51 , m_rtc(*this, "rtc") in bbc_stlrtc_device() 58 , m_rtc(*this, "rtc") in bbc_pmsrtc_device() 85 data = m_rtc->read(1); in read() 89 m_rtc->write(0, data); in read() 93 data = m_rtc->read(0); in read() 100 m_rtc->write(1, data); in read() 113 data |= m_rtc->read_0(); in read() 116 data |= m_rtc->read_1(); in read() 119 if (m_rtc->chip_enable()) in read() [all …]
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/dports/emulators/mess/mame-mame0226/src/devices/bus/bml3/ |
H A D | bml3rtc.cpp | 34 MSM5832(config, m_rtc, 32.768_kHz_XTAL); in device_add_mconfig() 46 data = m_rtc->data_r(); in bml3_rtc_r() 61 m_rtc->cs_w(1); //always selected in bml3_rtc_w() 62 m_rtc->write_w(BIT(data, 6)); in bml3_rtc_w() 63 m_rtc->read_w(BIT(data, 7)); in bml3_rtc_w() 64 m_rtc->address_w(data & 0x0f); in bml3_rtc_w() 70 m_rtc->hold_w(BIT(data, 6)); in bml3_rtc_w() 74 m_rtc->data_w(data & 0x0f); in bml3_rtc_w() 88 , m_rtc(*this, "rtc") in bml3bus_rtc_device()
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/dports/emulators/mame/mame-mame0226/src/devices/bus/bml3/ |
H A D | bml3rtc.cpp | 34 MSM5832(config, m_rtc, 32.768_kHz_XTAL); in device_add_mconfig() 46 data = m_rtc->data_r(); in bml3_rtc_r() 61 m_rtc->cs_w(1); //always selected in bml3_rtc_w() 62 m_rtc->write_w(BIT(data, 6)); in bml3_rtc_w() 63 m_rtc->read_w(BIT(data, 7)); in bml3_rtc_w() 64 m_rtc->address_w(data & 0x0f); in bml3_rtc_w() 70 m_rtc->hold_w(BIT(data, 6)); in bml3_rtc_w() 74 m_rtc->data_w(data & 0x0f); in bml3_rtc_w() 88 , m_rtc(*this, "rtc") in bml3bus_rtc_device()
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/dports/emulators/mess/mame-mame0226/src/devices/bus/a2bus/ |
H A D | nippelclock.cpp | 36 MC146818(config, m_rtc, 32.768_kHz_XTAL); in device_add_mconfig() 37 m_rtc->irq().set(FUNC(a2bus_nippelclock_device::irq_w)); in device_add_mconfig() 38 m_rtc->set_24hrs(true); in device_add_mconfig() 39 m_rtc->set_binary(true); in device_add_mconfig() 61 , m_rtc(*this, "rtc") in a2bus_nippelclock_device() 92 return m_rtc->read(offset - 6); in read_c0nx() 109 m_rtc->write(offset - 6, data); in write_c0nx()
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/dports/emulators/mame/mame-mame0226/src/devices/bus/a2bus/ |
H A D | nippelclock.cpp | 36 MC146818(config, m_rtc, 32.768_kHz_XTAL); in device_add_mconfig() 37 m_rtc->irq().set(FUNC(a2bus_nippelclock_device::irq_w)); in device_add_mconfig() 38 m_rtc->set_24hrs(true); in device_add_mconfig() 39 m_rtc->set_binary(true); in device_add_mconfig() 61 , m_rtc(*this, "rtc") in a2bus_nippelclock_device() 92 return m_rtc->read(offset - 6); in read_c0nx() 109 m_rtc->write(offset - 6, data); in write_c0nx()
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/dports/emulators/mess/mame-mame0226/src/devices/bus/c64/ |
H A D | ide64.cpp | 52 DS1302(config, m_rtc, 32.768_kHz_XTAL); in device_add_mconfig() 93 m_rtc(*this, DS1302_TAG), in c64_ide64_cartridge_device() 211 m_rtc->sclk_w(0); in c64_cd_r() 214 data |= m_rtc->io_r(); in c64_cd_r() 216 m_rtc->sclk_w(1); in c64_cd_r() 293 m_rtc->sclk_w(0); in c64_cd_w() 295 m_rtc->io_w(BIT(data, 0)); in c64_cd_w() 297 m_rtc->sclk_w(1); in c64_cd_w() 321 m_rtc->ce_w(BIT(data, 1)); in c64_cd_w()
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/dports/emulators/mame/mame-mame0226/src/devices/bus/c64/ |
H A D | ide64.cpp | 52 DS1302(config, m_rtc, 32.768_kHz_XTAL); in device_add_mconfig() 93 m_rtc(*this, DS1302_TAG), in c64_ide64_cartridge_device() 211 m_rtc->sclk_w(0); in c64_cd_r() 214 data |= m_rtc->io_r(); in c64_cd_r() 216 m_rtc->sclk_w(1); in c64_cd_r() 293 m_rtc->sclk_w(0); in c64_cd_w() 295 m_rtc->io_w(BIT(data, 0)); in c64_cd_w() 297 m_rtc->sclk_w(1); in c64_cd_w() 321 m_rtc->ce_w(BIT(data, 1)); in c64_cd_w()
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/dports/emulators/mess/mame-mame0226/src/devices/bus/samcoupe/expansion/ |
H A D | dallas.cpp | 25 DS12885(config, m_rtc, 32.768_kHz_XTAL); // should be DS12887 or DS1287 in device_add_mconfig() 26 m_rtc->set_24hrs(true); in device_add_mconfig() 41 m_rtc(*this, "rtc"), in sam_dallas_clock_device() 71 data &= m_rtc->read((offset >> 8) & 0x01); in iorq_r() 79 m_rtc->write((offset >> 8) & 0x01, data); in iorq_w()
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/dports/emulators/mame/mame-mame0226/src/devices/bus/samcoupe/expansion/ |
H A D | dallas.cpp | 25 DS12885(config, m_rtc, 32.768_kHz_XTAL); // should be DS12887 or DS1287 in device_add_mconfig() 26 m_rtc->set_24hrs(true); in device_add_mconfig() 41 m_rtc(*this, "rtc"), in sam_dallas_clock_device() 71 data &= m_rtc->read((offset >> 8) & 0x01); in iorq_r() 79 m_rtc->write((offset >> 8) & 0x01, data); in iorq_w()
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/dports/emulators/mess/mame-mame0226/src/devices/bus/hp_dio/ |
H A D | human_interface.cpp | 110 m_rtc(*this, "rtc"), in human_interface_device() 145 m_rtc->cs1_w(ASSERT_LINE); in device_reset() 146 m_rtc->cs2_w(CLEAR_LINE); in device_reset() 147 m_rtc->write_w(CLEAR_LINE); in device_reset() 148 m_rtc->read_w(CLEAR_LINE); in device_reset() 149 m_rtc->cs2_w(CLEAR_LINE); in device_reset() 273 m_rtc->d0_w(data & 0x01 ? ASSERT_LINE : CLEAR_LINE); in iocpu_port1_w() 274 m_rtc->d1_w(data & 0x02 ? ASSERT_LINE : CLEAR_LINE); in iocpu_port1_w() 275 m_rtc->d2_w(data & 0x04 ? ASSERT_LINE : CLEAR_LINE); in iocpu_port1_w() 276 m_rtc->d3_w(data & 0x08 ? ASSERT_LINE : CLEAR_LINE); in iocpu_port1_w() [all …]
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