/dports/biology/mmseqs2/MMseqs2-13-45111/lib/simde/simde/x86/avx512/ |
H A D | loadu.h | 40 return _mm_loadu_epi8(mem_addr); in simde_mm_loadu_epi8() 54 return _mm_loadu_epi8(mem_addr); in simde_mm_loadu_epi16() 68 return _mm_loadu_epi8(mem_addr); in simde_mm_loadu_epi32() 82 return _mm_loadu_epi8(mem_addr); in simde_mm_loadu_epi64() 96 return _mm256_loadu_epi8(mem_addr); in simde_mm256_loadu_epi8() 152 return _mm512_loadu_ps(mem_addr); in simde_mm512_loadu_ps() 168 return _mm512_loadu_pd(mem_addr); in simde_mm512_loadu_pd() 203 #define simde_mm512_loadu_epi8(mem_addr) simde_mm512_loadu_si512(mem_addr) argument 204 #define simde_mm512_loadu_epi16(mem_addr) simde_mm512_loadu_si512(mem_addr) argument 205 #define simde_mm512_loadu_epi32(mem_addr) simde_mm512_loadu_si512(mem_addr) argument [all …]
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H A D | storeu.h | 47 #define _mm512_storeu_ps(mem_addr, a) simde_mm512_storeu_ps(mem_addr, a) argument 61 #define _mm512_storeu_pd(mem_addr, a) simde_mm512_storeu_pd(mem_addr, a) argument 73 #define simde_mm512_storeu_epi8(mem_addr, a) simde_mm512_storeu_si512(mem_addr, a) argument 74 #define simde_mm512_storeu_epi16(mem_addr, a) simde_mm512_storeu_si512(mem_addr, a) argument 75 #define simde_mm512_storeu_epi32(mem_addr, a) simde_mm512_storeu_si512(mem_addr, a) argument 76 #define simde_mm512_storeu_epi64(mem_addr, a) simde_mm512_storeu_si512(mem_addr, a) argument 83 #define _mm512_storeu_si512(mem_addr, a) simde_mm512_storeu_si512(mem_addr, a) argument 84 #define _mm512_storeu_epi8(mem_addr, a) simde_mm512_storeu_si512(mem_addr, a) argument 85 #define _mm512_storeu_epi16(mem_addr, a) simde_mm512_storeu_si512(mem_addr, a) argument 86 #define _mm512_storeu_epi32(mem_addr, a) simde_mm512_storeu_si512(mem_addr, a) argument [all …]
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H A D | store.h | 47 #define _mm512_store_ps(mem_addr, a) simde_mm512_store_ps(mem_addr, a) argument 61 #define _mm512_store_pd(mem_addr, a) simde_mm512_store_pd(mem_addr, a) argument 73 #define simde_mm512_store_epi8(mem_addr, a) simde_mm512_store_si512(mem_addr, a) argument 74 #define simde_mm512_store_epi16(mem_addr, a) simde_mm512_store_si512(mem_addr, a) argument 75 #define simde_mm512_store_epi32(mem_addr, a) simde_mm512_store_si512(mem_addr, a) argument 76 #define simde_mm512_store_epi64(mem_addr, a) simde_mm512_store_si512(mem_addr, a) argument 83 #define _mm512_store_si512(mem_addr, a) simde_mm512_store_si512(mem_addr, a) argument 84 #define _mm512_store_epi8(mem_addr, a) simde_mm512_store_si512(mem_addr, a) argument 85 #define _mm512_store_epi16(mem_addr, a) simde_mm512_store_si512(mem_addr, a) argument 86 #define _mm512_store_epi32(mem_addr, a) simde_mm512_store_si512(mem_addr, a) argument [all …]
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H A D | load.h | 38 simde_mm512_load_si512 (void const * mem_addr) { in simde_mm512_load_si512() argument 40 return _mm512_load_si512(SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m512i)); in simde_mm512_load_si512() 43 simde_memcpy(&r, SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m512i), sizeof(r)); in simde_mm512_load_si512() 47 #define simde_mm512_load_epi8(mem_addr) simde_mm512_load_si512(mem_addr) argument 48 #define simde_mm512_load_epi16(mem_addr) simde_mm512_load_si512(mem_addr) argument 49 #define simde_mm512_load_epi32(mem_addr) simde_mm512_load_si512(mem_addr) argument 50 #define simde_mm512_load_epi64(mem_addr) simde_mm512_load_si512(mem_addr) argument
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/dports/devel/simde/simde-0.7.2/simde/x86/avx512/ |
H A D | storeu.h | 47 #define _mm512_storeu_ps(mem_addr, a) simde_mm512_storeu_ps(mem_addr, a) argument 61 #define _mm512_storeu_pd(mem_addr, a) simde_mm512_storeu_pd(mem_addr, a) argument 73 #define simde_mm512_storeu_epi8(mem_addr, a) simde_mm512_storeu_si512(mem_addr, a) argument 74 #define simde_mm512_storeu_epi16(mem_addr, a) simde_mm512_storeu_si512(mem_addr, a) argument 75 #define simde_mm512_storeu_epi32(mem_addr, a) simde_mm512_storeu_si512(mem_addr, a) argument 76 #define simde_mm512_storeu_epi64(mem_addr, a) simde_mm512_storeu_si512(mem_addr, a) argument 83 #define _mm512_storeu_si512(mem_addr, a) simde_mm512_storeu_si512(mem_addr, a) argument 84 #define _mm512_storeu_epi8(mem_addr, a) simde_mm512_storeu_si512(mem_addr, a) argument 85 #define _mm512_storeu_epi16(mem_addr, a) simde_mm512_storeu_si512(mem_addr, a) argument 86 #define _mm512_storeu_epi32(mem_addr, a) simde_mm512_storeu_si512(mem_addr, a) argument [all …]
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H A D | store.h | 47 #define _mm512_store_ps(mem_addr, a) simde_mm512_store_ps(mem_addr, a) argument 61 #define _mm512_store_pd(mem_addr, a) simde_mm512_store_pd(mem_addr, a) argument 73 #define simde_mm512_store_epi8(mem_addr, a) simde_mm512_store_si512(mem_addr, a) argument 74 #define simde_mm512_store_epi16(mem_addr, a) simde_mm512_store_si512(mem_addr, a) argument 75 #define simde_mm512_store_epi32(mem_addr, a) simde_mm512_store_si512(mem_addr, a) argument 76 #define simde_mm512_store_epi64(mem_addr, a) simde_mm512_store_si512(mem_addr, a) argument 83 #define _mm512_store_si512(mem_addr, a) simde_mm512_store_si512(mem_addr, a) argument 84 #define _mm512_store_epi8(mem_addr, a) simde_mm512_store_si512(mem_addr, a) argument 85 #define _mm512_store_epi16(mem_addr, a) simde_mm512_store_si512(mem_addr, a) argument 86 #define _mm512_store_epi32(mem_addr, a) simde_mm512_store_si512(mem_addr, a) argument [all …]
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H A D | loadu.h | 38 simde_mm512_loadu_ps (void const * mem_addr) { in simde_mm512_loadu_ps() argument 40 return _mm512_loadu_ps(mem_addr); in simde_mm512_loadu_ps() 43 simde_memcpy(&r, mem_addr, sizeof(r)); in simde_mm512_loadu_ps() 54 simde_mm512_loadu_pd (void const * mem_addr) { in simde_mm512_loadu_pd() argument 56 return _mm512_loadu_pd(mem_addr); in simde_mm512_loadu_pd() 59 simde_memcpy(&r, mem_addr, sizeof(r)); in simde_mm512_loadu_pd() 85 simde_memcpy(&r, mem_addr, sizeof(r)); in simde_mm512_loadu_si512() 91 #define simde_mm512_loadu_epi8(mem_addr) simde_mm512_loadu_si512(mem_addr) argument 92 #define simde_mm512_loadu_epi16(mem_addr) simde_mm512_loadu_si512(mem_addr) argument 93 #define simde_mm512_loadu_epi32(mem_addr) simde_mm512_loadu_si512(mem_addr) argument [all …]
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H A D | load.h | 38 simde_mm512_load_si512 (void const * mem_addr) { in simde_mm512_load_si512() argument 40 return _mm512_load_si512(SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m512i)); in simde_mm512_load_si512() 43 simde_memcpy(&r, SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m512i), sizeof(r)); in simde_mm512_load_si512() 47 #define simde_mm512_load_epi8(mem_addr) simde_mm512_load_si512(mem_addr) argument 48 #define simde_mm512_load_epi16(mem_addr) simde_mm512_load_si512(mem_addr) argument 49 #define simde_mm512_load_epi32(mem_addr) simde_mm512_load_si512(mem_addr) argument 50 #define simde_mm512_load_epi64(mem_addr) simde_mm512_load_si512(mem_addr) argument
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/dports/biology/bowtie2/simde-no-tests-f6a0b3b/x86/avx512/ |
H A D | storeu.h | 47 #define _mm512_storeu_ps(mem_addr, a) simde_mm512_storeu_ps(mem_addr, a) argument 61 #define _mm512_storeu_pd(mem_addr, a) simde_mm512_storeu_pd(mem_addr, a) argument 73 #define simde_mm512_storeu_epi8(mem_addr, a) simde_mm512_storeu_si512(mem_addr, a) argument 74 #define simde_mm512_storeu_epi16(mem_addr, a) simde_mm512_storeu_si512(mem_addr, a) argument 75 #define simde_mm512_storeu_epi32(mem_addr, a) simde_mm512_storeu_si512(mem_addr, a) argument 76 #define simde_mm512_storeu_epi64(mem_addr, a) simde_mm512_storeu_si512(mem_addr, a) argument 83 #define _mm512_storeu_si512(mem_addr, a) simde_mm512_storeu_si512(mem_addr, a) argument 84 #define _mm512_storeu_epi8(mem_addr, a) simde_mm512_storeu_si512(mem_addr, a) argument 85 #define _mm512_storeu_epi16(mem_addr, a) simde_mm512_storeu_si512(mem_addr, a) argument 86 #define _mm512_storeu_epi32(mem_addr, a) simde_mm512_storeu_si512(mem_addr, a) argument [all …]
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H A D | store.h | 47 #define _mm512_store_ps(mem_addr, a) simde_mm512_store_ps(mem_addr, a) argument 61 #define _mm512_store_pd(mem_addr, a) simde_mm512_store_pd(mem_addr, a) argument 73 #define simde_mm512_store_epi8(mem_addr, a) simde_mm512_store_si512(mem_addr, a) argument 74 #define simde_mm512_store_epi16(mem_addr, a) simde_mm512_store_si512(mem_addr, a) argument 75 #define simde_mm512_store_epi32(mem_addr, a) simde_mm512_store_si512(mem_addr, a) argument 76 #define simde_mm512_store_epi64(mem_addr, a) simde_mm512_store_si512(mem_addr, a) argument 83 #define _mm512_store_si512(mem_addr, a) simde_mm512_store_si512(mem_addr, a) argument 84 #define _mm512_store_epi8(mem_addr, a) simde_mm512_store_si512(mem_addr, a) argument 85 #define _mm512_store_epi16(mem_addr, a) simde_mm512_store_si512(mem_addr, a) argument 86 #define _mm512_store_epi32(mem_addr, a) simde_mm512_store_si512(mem_addr, a) argument [all …]
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H A D | loadu.h | 38 simde_mm512_loadu_ps (void const * mem_addr) { in simde_mm512_loadu_ps() argument 43 return _mm512_loadu_ps(mem_addr); in simde_mm512_loadu_ps() 47 simde_memcpy(&r, mem_addr, sizeof(r)); in simde_mm512_loadu_ps() 58 simde_mm512_loadu_pd (void const * mem_addr) { in simde_mm512_loadu_pd() argument 63 return _mm512_loadu_pd(mem_addr); in simde_mm512_loadu_pd() 67 simde_memcpy(&r, mem_addr, sizeof(r)); in simde_mm512_loadu_pd() 93 simde_memcpy(&r, mem_addr, sizeof(r)); in simde_mm512_loadu_si512() 99 #define simde_mm512_loadu_epi8(mem_addr) simde_mm512_loadu_si512(mem_addr) argument 100 #define simde_mm512_loadu_epi16(mem_addr) simde_mm512_loadu_si512(mem_addr) argument 101 #define simde_mm512_loadu_epi32(mem_addr) simde_mm512_loadu_si512(mem_addr) argument [all …]
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H A D | load.h | 38 simde_mm512_load_si512 (void const * mem_addr) { in simde_mm512_load_si512() argument 40 return _mm512_load_si512(SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m512i)); in simde_mm512_load_si512() 43 simde_memcpy(&r, SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m512i), sizeof(r)); in simde_mm512_load_si512() 47 #define simde_mm512_load_epi8(mem_addr) simde_mm512_load_si512(mem_addr) argument 48 #define simde_mm512_load_epi16(mem_addr) simde_mm512_load_si512(mem_addr) argument 49 #define simde_mm512_load_epi32(mem_addr) simde_mm512_load_si512(mem_addr) argument 50 #define simde_mm512_load_epi64(mem_addr) simde_mm512_load_si512(mem_addr) argument
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/dports/emulators/spim/spim-8.0/CPU/ |
H A D | mem.h | 49 #define TEXT_BOT ((mem_addr) 0x400000) 51 extern mem_addr text_top; 74 extern mem_addr data_top; 87 extern mem_addr stack_bot; 100 extern mem_addr k_text_top; 113 extern mem_addr k_data_top; 152 void* mem_reference(mem_addr addr); 153 void print_mem (mem_addr addr); 155 reg_word read_mem_byte(mem_addr addr); 156 reg_word read_mem_half(mem_addr addr); [all …]
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H A D | spim-utils.h | 48 void add_breakpoint (mem_addr addr); 49 void delete_breakpoint (mem_addr addr); 51 void format_insts (str_stream *ss, mem_addr from, mem_addr to); 52 void format_mem (str_stream *ss, mem_addr from, mem_addr to); 61 int run_program (mem_addr pc, int steps, int display, int cont_bkpt); 62 mem_addr starting_address ();
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/dports/devel/avr-libc/avr-libc-2.0.0/include/avr/ |
H A D | sfr_defs.h | 128 #define _MMIO_BYTE(mem_addr) (*(volatile uint8_t *)(mem_addr)) argument 129 #define _MMIO_WORD(mem_addr) (*(volatile uint16_t *)(mem_addr)) argument 130 #define _MMIO_DWORD(mem_addr) (*(volatile uint32_t *)(mem_addr)) argument 149 #define _SFR_MEM8(mem_addr) (mem_addr) argument 150 #define _SFR_MEM16(mem_addr) (mem_addr) argument 151 #define _SFR_MEM32(mem_addr) (mem_addr) argument 176 #define _SFR_MEM8(mem_addr) _MMIO_BYTE(mem_addr) argument 177 #define _SFR_MEM16(mem_addr) _MMIO_WORD(mem_addr) argument 178 #define _SFR_MEM32(mem_addr) _MMIO_DWORD(mem_addr) argument
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/dports/devel/trellis/prjtrellis-5eb0ad87/examples/soc_versa5g/ |
H A D | attosoc.v | 53 wire [31:0] mem_addr; net 61 if (mem_addr[31:24] == 8'h00 && mem_valid) begin 62 if (mem_wstrb[0]) ram[mem_addr[23:2]][7:0] <= mem_wdata[7:0]; 63 if (mem_wstrb[1]) ram[mem_addr[23:2]][15:8] <= mem_wdata[15:8]; 64 if (mem_wstrb[2]) ram[mem_addr[23:2]][23:16] <= mem_wdata[23:16]; 65 if (mem_wstrb[3]) ram[mem_addr[23:2]][31:24] <= mem_wdata[31:24]; 67 ram_rdata <= ram[mem_addr[23:2]]; 79 assign iomem_valid = mem_valid && (mem_addr[31:24] > 8'h 01); 81 assign iomem_addr = mem_addr; 93 if (iomem_valid && iomem_wstrb[0] && mem_addr == 32'h 02000000) begin [all …]
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/dports/devel/trellis/prjtrellis-5eb0ad87/examples/soc_ecp5_evn/ |
H A D | attosoc.v | 53 wire [31:0] mem_addr; net 61 if (mem_addr[31:24] == 8'h00 && mem_valid) begin 62 if (mem_wstrb[0]) ram[mem_addr[23:2]][7:0] <= mem_wdata[7:0]; 63 if (mem_wstrb[1]) ram[mem_addr[23:2]][15:8] <= mem_wdata[15:8]; 64 if (mem_wstrb[2]) ram[mem_addr[23:2]][23:16] <= mem_wdata[23:16]; 65 if (mem_wstrb[3]) ram[mem_addr[23:2]][31:24] <= mem_wdata[31:24]; 67 ram_rdata <= ram[mem_addr[23:2]]; 79 assign iomem_valid = mem_valid && (mem_addr[31:24] > 8'h 01); 81 assign iomem_addr = mem_addr; 93 if (iomem_valid && iomem_wstrb[0] && mem_addr == 32'h 02000000) begin [all …]
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/dports/security/py-pyvex/pyvex-9.0.5405/tests/ |
H A D | test_arm_postprocess.py | 24 mem_addr=0x1041f, 35 mem_addr=0x10431, 48 mem_addr=0x10435, 69 mem_addr=0x1043f, 82 mem_addr=0x10455, 99 mem_addr=0x10325, 120 mem_addr=0x10333, 133 mem_addr=0x10349, 144 mem_addr=0x10353, 157 mem_addr=0x10357, [all …]
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/dports/lang/rust/rustc-1.58.1-src/library/stdarch/crates/core_arch/src/x86_64/ |
H A D | xsave.rs | 38 pub unsafe fn _xsave64(mem_addr: *mut u8, save_mask: u64) { in _xsave64() 39 xsave64(mem_addr, (save_mask >> 32) as u32, save_mask as u32); in _xsave64() 54 pub unsafe fn _xrstor64(mem_addr: *const u8, rs_mask: u64) { in _xrstor64() 55 xrstor64(mem_addr, (rs_mask >> 32) as u32, rs_mask as u32); in _xrstor64() 71 pub unsafe fn _xsaveopt64(mem_addr: *mut u8, save_mask: u64) { in _xsaveopt64() 87 pub unsafe fn _xsavec64(mem_addr: *mut u8, save_mask: u64) { in _xsavec64() 88 xsavec64(mem_addr, (save_mask >> 32) as u32, save_mask as u32); in _xsavec64() 104 pub unsafe fn _xsaves64(mem_addr: *mut u8, save_mask: u64) { in _xsaves64() 105 xsaves64(mem_addr, (save_mask >> 32) as u32, save_mask as u32); in _xsaves64() 123 pub unsafe fn _xrstors64(mem_addr: *const u8, rs_mask: u64) { in _xrstors64() [all …]
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/dports/sysutils/i2c-tools/i2c-tools-4.1/eeprog/ |
H A D | 24cXX.c | 124 int eeprom_24c32_write_byte(struct eeprom *e, __u16 mem_addr, __u8 data) 126 __u8 buf[3] = { (mem_addr >> 8) & 0x00ff, mem_addr & 0x00ff, data }; 137 int eeprom_24c32_read_byte(struct eeprom* e, __u16 mem_addr) 141 __u8 buf[2] = { (mem_addr >> 8) & 0x0ff, mem_addr & 0x0ff }; 157 int eeprom_read_byte(struct eeprom* e, __u16 mem_addr) in eeprom_read_byte() argument 163 __u8 buf = mem_addr & 0x0ff; in eeprom_read_byte() 166 __u8 buf[2] = { (mem_addr >> 8) & 0x0ff, mem_addr & 0x0ff }; in eeprom_read_byte() 178 int eeprom_write_byte(struct eeprom *e, __u16 mem_addr, __u8 data) in eeprom_write_byte() argument 181 __u8 buf[2] = { mem_addr & 0x00ff, data }; in eeprom_write_byte() 185 { (mem_addr >> 8) & 0x00ff, mem_addr & 0x00ff, data }; in eeprom_write_byte()
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/dports/devel/trellis/prjtrellis-5eb0ad87/examples/picorv32_tinyfpga/ |
H A D | attosoc.v | 45 wire [31:0] rom_rdata = {rom[mem_addr+3], rom[mem_addr+2], rom[mem_addr+1], rom[mem_addr+0]}; 51 wire [31:0] mem_addr; net 56 wire rom_ready = mem_valid && mem_addr[31:24] == 8'h00; 65 assign iomem_valid = mem_valid && (mem_addr[31:24] > 8'h 01); 68 assign iomem_addr = mem_addr; 98 .mem_addr (mem_addr ),
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/dports/devel/trellis/prjtrellis-5eb0ad87/examples/picorv32_versa5g/ |
H A D | attosoc.v | 45 wire [31:0] rom_rdata = {rom[mem_addr+3], rom[mem_addr+2], rom[mem_addr+1], rom[mem_addr+0]}; 51 wire [31:0] mem_addr; net 56 wire rom_ready = mem_valid && mem_addr[31:24] == 8'h00; 65 assign iomem_valid = mem_valid && (mem_addr[31:24] > 8'h 01); 68 assign iomem_addr = mem_addr; 98 .mem_addr (mem_addr ),
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/dports/devel/trellis/prjtrellis-5eb0ad87/examples/picorv32_ulx3s/ |
H A D | attosoc.v | 45 wire [31:0] rom_rdata = {rom[mem_addr+3], rom[mem_addr+2], rom[mem_addr+1], rom[mem_addr+0]}; 51 wire [31:0] mem_addr; net 56 wire rom_ready = mem_valid && mem_addr[31:24] == 8'h00; 65 assign iomem_valid = mem_valid && (mem_addr[31:24] > 8'h 01); 68 assign iomem_addr = mem_addr; 98 .mem_addr (mem_addr ),
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/dports/devel/nextpnr/nextpnr-48cd407/ice40/smoketest/attosoc/ |
H A D | attosoc.v | 45 wire [31:0] rom_rdata = {rom[mem_addr+3], rom[mem_addr+2], rom[mem_addr+1], rom[mem_addr+0]}; 51 wire [31:0] mem_addr; net 56 wire rom_ready = mem_valid && mem_addr[31:24] == 8'h00; 65 assign iomem_valid = mem_valid && (mem_addr[31:24] > 8'h 01); 68 assign iomem_addr = mem_addr; 98 .mem_addr (mem_addr ),
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/dports/devel/nextpnr/nextpnr-48cd407/ice40/benchmark/ |
H A D | picosoc.v | 84 wire [31:0] mem_addr; net 95 assign iomem_valid = mem_valid && (mem_addr[31:24] > 8'h 01); 97 assign iomem_addr = mem_addr; 100 wire spimemio_cfgreg_sel = mem_valid && (mem_addr == 32'h 0200_0000); 103 wire simpleuart_reg_div_sel = mem_valid && (mem_addr == 32'h 0200_0004); 106 wire simpleuart_reg_dat_sel = mem_valid && (mem_addr == 32'h 0200_0008); 133 .mem_addr (mem_addr ), 143 .valid (mem_valid && mem_addr >= 4*MEM_WORDS && mem_addr < 32'h 0200_0000), 145 .addr (mem_addr[23:0]), 190 ram_ready <= mem_valid && !mem_ready && mem_addr < 4*MEM_WORDS; [all …]
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