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Searched refs:mips_sim_insn (Results 1 – 25 of 62) sorted by relevance

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/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/gcc-4.1-20060728/gcc/config/mips/
H A Dmips.c8408 static rtx mips_sim_insn; variable
8494 mips_sim_wait_reg (data, mips_sim_insn, *x); in mips_sim_wait_regs_2()
8512 mips_sim_insn = insn; in mips_sim_wait_regs()
8553 state->last_set[REGNO (x) + i].insn = mips_sim_insn; in mips_sim_record_set()
8568 mips_sim_insn = insn; in mips_sim_issue_insn()
/dports/lang/gcc48/gcc-4.8.5/gcc/config/mips/
H A Dmips.c15070 static rtx mips_sim_insn; variable
15170 mips_sim_wait_reg ((struct mips_sim *) data, mips_sim_insn, *x); in mips_sim_wait_regs_2()
15188 mips_sim_insn = insn; in mips_sim_wait_regs()
15232 state->last_set[regno].insn = mips_sim_insn; in mips_sim_record_set()
15251 mips_sim_insn = insn; in mips_sim_issue_insn()
/dports/devel/mingw32-gcc/gcc-4.8.1/gcc/config/mips/
H A Dmips.c15082 static rtx mips_sim_insn; variable
15182 mips_sim_wait_reg ((struct mips_sim *) data, mips_sim_insn, *x); in mips_sim_wait_regs_2()
15200 mips_sim_insn = insn; in mips_sim_wait_regs()
15244 state->last_set[regno].insn = mips_sim_insn; in mips_sim_record_set()
15263 mips_sim_insn = insn; in mips_sim_issue_insn()
/dports/lang/gnat_util/gcc-6-20180516/gcc/config/mips/
H A Dmips.c16188 static rtx_insn *mips_sim_insn; variable
16290 mips_sim_wait_reg ((struct mips_sim *) data, mips_sim_insn, *iter); in mips_sim_wait_regs_1()
16299 mips_sim_insn = insn; in mips_sim_wait_regs()
16343 state->last_set[regno].insn = mips_sim_insn; in mips_sim_record_set()
16362 mips_sim_insn = insn; in mips_sim_issue_insn()
/dports/devel/arm-none-eabi-gcc492/gcc-4.9.2/gcc/config/mips/
H A Dmips.c15490 static rtx mips_sim_insn; variable
15590 mips_sim_wait_reg ((struct mips_sim *) data, mips_sim_insn, *x); in mips_sim_wait_regs_2()
15608 mips_sim_insn = insn; in mips_sim_wait_regs()
15652 state->last_set[regno].insn = mips_sim_insn; in mips_sim_record_set()
15671 mips_sim_insn = insn; in mips_sim_issue_insn()
/dports/lang/gcc6-aux/gcc-6-20180516/gcc/config/mips/
H A Dmips.c16188 static rtx_insn *mips_sim_insn; variable
16290 mips_sim_wait_reg ((struct mips_sim *) data, mips_sim_insn, *iter); in mips_sim_wait_regs_1()
16299 mips_sim_insn = insn; in mips_sim_wait_regs()
16343 state->last_set[regno].insn = mips_sim_insn; in mips_sim_record_set()
16362 mips_sim_insn = insn; in mips_sim_issue_insn()
/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/config/mips/
H A Dmips.c18050 static rtx_insn *mips_sim_insn; variable
18152 mips_sim_wait_reg ((struct mips_sim *) data, mips_sim_insn, *iter); in mips_sim_wait_regs_1()
18161 mips_sim_insn = insn; in mips_sim_wait_regs()
18205 state->last_set[regno].insn = mips_sim_insn; in mips_sim_record_set()
18224 mips_sim_insn = insn; in mips_sim_issue_insn()
/dports/lang/gcc9/gcc-9.4.0/gcc/config/mips/
H A Dmips.c18129 static rtx_insn *mips_sim_insn; variable
18231 mips_sim_wait_reg ((struct mips_sim *) data, mips_sim_insn, *iter); in mips_sim_wait_regs_1()
18240 mips_sim_insn = insn; in mips_sim_wait_regs()
18284 state->last_set[regno].insn = mips_sim_insn; in mips_sim_record_set()
18303 mips_sim_insn = insn; in mips_sim_issue_insn()
/dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/config/mips/
H A Dmips.c18050 static rtx_insn *mips_sim_insn; variable
18152 mips_sim_wait_reg ((struct mips_sim *) data, mips_sim_insn, *iter); in mips_sim_wait_regs_1()
18161 mips_sim_insn = insn; in mips_sim_wait_regs()
18205 state->last_set[regno].insn = mips_sim_insn; in mips_sim_record_set()
18224 mips_sim_insn = insn; in mips_sim_issue_insn()
/dports/devel/avr-gcc/gcc-10.2.0/gcc/config/mips/
H A Dmips.c18174 static rtx_insn *mips_sim_insn; variable
18276 mips_sim_wait_reg ((struct mips_sim *) data, mips_sim_insn, *iter); in mips_sim_wait_regs_1()
18285 mips_sim_insn = insn; in mips_sim_wait_regs()
18329 state->last_set[regno].insn = mips_sim_insn; in mips_sim_record_set()
18348 mips_sim_insn = insn; in mips_sim_issue_insn()
/dports/lang/gcc11-devel/gcc-11-20211009/gcc/config/mips/
H A Dmips.c18174 static rtx_insn *mips_sim_insn; variable
18276 mips_sim_wait_reg ((struct mips_sim *) data, mips_sim_insn, *iter); in mips_sim_wait_regs_1()
18285 mips_sim_insn = insn; in mips_sim_wait_regs()
18329 state->last_set[regno].insn = mips_sim_insn; in mips_sim_record_set()
18348 mips_sim_insn = insn; in mips_sim_issue_insn()
/dports/lang/gcc10-devel/gcc-10-20211008/gcc/config/mips/
H A Dmips.c18174 static rtx_insn *mips_sim_insn; variable
18276 mips_sim_wait_reg ((struct mips_sim *) data, mips_sim_insn, *iter); in mips_sim_wait_regs_1()
18285 mips_sim_insn = insn; in mips_sim_wait_regs()
18329 state->last_set[regno].insn = mips_sim_insn; in mips_sim_record_set()
18348 mips_sim_insn = insn; in mips_sim_issue_insn()
/dports/lang/gcc12-devel/gcc-12-20211205/gcc/config/mips/
H A Dmips.c18198 static rtx_insn *mips_sim_insn; variable
18300 mips_sim_wait_reg ((struct mips_sim *) data, mips_sim_insn, *iter); in mips_sim_wait_regs_1()
18309 mips_sim_insn = insn; in mips_sim_wait_regs()
18353 state->last_set[regno].insn = mips_sim_insn; in mips_sim_record_set()
18372 mips_sim_insn = insn; in mips_sim_issue_insn()
/dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/config/mips/
H A Dmips.c18050 static rtx_insn *mips_sim_insn; variable
18152 mips_sim_wait_reg ((struct mips_sim *) data, mips_sim_insn, *iter); in mips_sim_wait_regs_1()
18161 mips_sim_insn = insn; in mips_sim_wait_regs()
18205 state->last_set[regno].insn = mips_sim_insn; in mips_sim_record_set()
18224 mips_sim_insn = insn; in mips_sim_issue_insn()
/dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/config/mips/
H A Dmips.c18050 static rtx_insn *mips_sim_insn; variable
18152 mips_sim_wait_reg ((struct mips_sim *) data, mips_sim_insn, *iter); in mips_sim_wait_regs_1()
18161 mips_sim_insn = insn; in mips_sim_wait_regs()
18205 state->last_set[regno].insn = mips_sim_insn; in mips_sim_record_set()
18224 mips_sim_insn = insn; in mips_sim_issue_insn()
/dports/devel/riscv64-gcc/gcc-8.3.0/gcc/config/mips/
H A Dmips.c18037 static rtx_insn *mips_sim_insn; variable
18139 mips_sim_wait_reg ((struct mips_sim *) data, mips_sim_insn, *iter); in mips_sim_wait_regs_1()
18148 mips_sim_insn = insn; in mips_sim_wait_regs()
18192 state->last_set[regno].insn = mips_sim_insn; in mips_sim_record_set()
18211 mips_sim_insn = insn; in mips_sim_issue_insn()
/dports/misc/cxx_atomics_pic/gcc-11.2.0/gcc/config/mips/
H A Dmips.c18174 static rtx_insn *mips_sim_insn; variable
18276 mips_sim_wait_reg ((struct mips_sim *) data, mips_sim_insn, *iter); in mips_sim_wait_regs_1()
18285 mips_sim_insn = insn; in mips_sim_wait_regs()
18329 state->last_set[regno].insn = mips_sim_insn; in mips_sim_record_set()
18348 mips_sim_insn = insn; in mips_sim_issue_insn()
/dports/lang/gcc9-aux/gcc-9.1.0/gcc/config/mips/
H A Dmips.c18105 static rtx_insn *mips_sim_insn; variable
18207 mips_sim_wait_reg ((struct mips_sim *) data, mips_sim_insn, *iter); in mips_sim_wait_regs_1()
18216 mips_sim_insn = insn; in mips_sim_wait_regs()
18260 state->last_set[regno].insn = mips_sim_insn; in mips_sim_record_set()
18279 mips_sim_insn = insn; in mips_sim_issue_insn()
/dports/lang/gcc10/gcc-10.3.0/gcc/config/mips/
H A Dmips.c18174 static rtx_insn *mips_sim_insn; variable
18276 mips_sim_wait_reg ((struct mips_sim *) data, mips_sim_insn, *iter); in mips_sim_wait_regs_1()
18285 mips_sim_insn = insn; in mips_sim_wait_regs()
18329 state->last_set[regno].insn = mips_sim_insn; in mips_sim_record_set()
18348 mips_sim_insn = insn; in mips_sim_issue_insn()
/dports/lang/gcc9-devel/gcc-9-20211007/gcc/config/mips/
H A Dmips.c18129 static rtx_insn *mips_sim_insn; variable
18231 mips_sim_wait_reg ((struct mips_sim *) data, mips_sim_insn, *iter); in mips_sim_wait_regs_1()
18240 mips_sim_insn = insn; in mips_sim_wait_regs()
18284 state->last_set[regno].insn = mips_sim_insn; in mips_sim_record_set()
18303 mips_sim_insn = insn; in mips_sim_issue_insn()
/dports/lang/gcc8/gcc-8.5.0/gcc/config/mips/
H A Dmips.c18050 static rtx_insn *mips_sim_insn; variable
18152 mips_sim_wait_reg ((struct mips_sim *) data, mips_sim_insn, *iter); in mips_sim_wait_regs_1()
18161 mips_sim_insn = insn; in mips_sim_wait_regs()
18205 state->last_set[regno].insn = mips_sim_insn; in mips_sim_record_set()
18224 mips_sim_insn = insn; in mips_sim_issue_insn()
/dports/lang/gcc11/gcc-11.2.0/gcc/config/mips/
H A Dmips.c18174 static rtx_insn *mips_sim_insn; variable
18276 mips_sim_wait_reg ((struct mips_sim *) data, mips_sim_insn, *iter); in mips_sim_wait_regs_1()
18285 mips_sim_insn = insn; in mips_sim_wait_regs()
18329 state->last_set[regno].insn = mips_sim_insn; in mips_sim_record_set()
18348 mips_sim_insn = insn; in mips_sim_issue_insn()
/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/
H A DChangeLog-201413390 * config/mips/mips.c (mips_sim_insn): Update comment.
24791 (mips_sim_insn): Likewise for this variable.
/dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/
H A DChangeLog-201413390 * config/mips/mips.c (mips_sim_insn): Update comment.
24791 (mips_sim_insn): Likewise for this variable.
/dports/devel/avr-gcc/gcc-10.2.0/gcc/
H A DChangeLog-201413390 * config/mips/mips.c (mips_sim_insn): Update comment.
24791 (mips_sim_insn): Likewise for this variable.

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