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Searched refs:mmCGTS_CU5_SP0_CTRL_REG (Results 1 – 25 of 28) sorted by relevance

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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Dmxgpu_vi.c195 mmCGTS_CU5_SP0_CTRL_REG, 0xffffffff, 0x00010000,
H A Dgfx_v8_0.c287 mmCGTS_CU5_SP0_CTRL_REG, 0xffffffff, 0x00010000,
561 mmCGTS_CU5_SP0_CTRL_REG, 0xffffffff, 0x00010000,
657 mmCGTS_CU5_SP0_CTRL_REG, 0xffffffff, 0x00010000,
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Dmxgpu_vi.c195 mmCGTS_CU5_SP0_CTRL_REG, 0xffffffff, 0x00010000,
H A Dgfx_v8_0.c287 mmCGTS_CU5_SP0_CTRL_REG, 0xffffffff, 0x00010000,
561 mmCGTS_CU5_SP0_CTRL_REG, 0xffffffff, 0x00010000,
657 mmCGTS_CU5_SP0_CTRL_REG, 0xffffffff, 0x00010000,
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Dmxgpu_vi.c195 mmCGTS_CU5_SP0_CTRL_REG, 0xffffffff, 0x00010000,
H A Dgfx_v8_0.c287 mmCGTS_CU5_SP0_CTRL_REG, 0xffffffff, 0x00010000,
561 mmCGTS_CU5_SP0_CTRL_REG, 0xffffffff, 0x00010000,
657 mmCGTS_CU5_SP0_CTRL_REG, 0xffffffff, 0x00010000,
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_d.h1531 #define mmCGTS_CU5_SP0_CTRL_REG 0xf021 macro
H A Dgfx_7_0_d.h1510 #define mmCGTS_CU5_SP0_CTRL_REG 0xf021 macro
H A Dgfx_8_0_d.h1724 #define mmCGTS_CU5_SP0_CTRL_REG 0xf021 macro
H A Dgfx_8_1_d.h1692 #define mmCGTS_CU5_SP0_CTRL_REG 0xf021 macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_d.h1531 #define mmCGTS_CU5_SP0_CTRL_REG 0xf021 macro
H A Dgfx_7_0_d.h1510 #define mmCGTS_CU5_SP0_CTRL_REG 0xf021 macro
H A Dgfx_8_1_d.h1692 #define mmCGTS_CU5_SP0_CTRL_REG 0xf021 macro
H A Dgfx_8_0_d.h1724 #define mmCGTS_CU5_SP0_CTRL_REG 0xf021 macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h1510 #define mmCGTS_CU5_SP0_CTRL_REG 0xf021 macro
H A Dgfx_7_2_d.h1531 #define mmCGTS_CU5_SP0_CTRL_REG 0xf021 macro
H A Dgfx_8_0_d.h1724 #define mmCGTS_CU5_SP0_CTRL_REG 0xf021 macro
H A Dgfx_8_1_d.h1692 #define mmCGTS_CU5_SP0_CTRL_REG 0xf021 macro
/dports/sysutils/roct/ROCT-Thunk-Interface-9d1fb76/tests/kfdtest/include/asic_reg/
H A Dgfx_7_2_d.h1531 #define mmCGTS_CU5_SP0_CTRL_REG 0xf021 macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6363 #define mmCGTS_CU5_SP0_CTRL_REG macro
H A Dgc_9_1_offset.h6585 #define mmCGTS_CU5_SP0_CTRL_REG macro
H A Dgc_9_2_1_offset.h6597 #define mmCGTS_CU5_SP0_CTRL_REG macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6363 #define mmCGTS_CU5_SP0_CTRL_REG macro
H A Dgc_9_2_1_offset.h6597 #define mmCGTS_CU5_SP0_CTRL_REG macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6363 #define mmCGTS_CU5_SP0_CTRL_REG macro

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