/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/ |
H A D | gfx_v6_0.c | 2256 u32 tmp = RREG32(mmCP_INT_CNTL_RING0); in gfx_v6_0_enable_gui_idle_interrupt() 2266 WREG32(mmCP_INT_CNTL_RING0, tmp); in gfx_v6_0_enable_gui_idle_interrupt() 3243 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v6_0_set_gfx_eop_interrupt_state() 3245 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v6_0_set_gfx_eop_interrupt_state() 3248 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v6_0_set_gfx_eop_interrupt_state() 3250 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v6_0_set_gfx_eop_interrupt_state() 3306 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v6_0_set_priv_reg_fault_state() 3308 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v6_0_set_priv_reg_fault_state() 3313 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v6_0_set_priv_reg_fault_state() 3333 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v6_0_set_priv_inst_fault_state() [all …]
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H A D | gfx_v7_0.c | 3165 u32 tmp = RREG32(mmCP_INT_CNTL_RING0); in gfx_v7_0_enable_gui_idle_interrupt() 3173 WREG32(mmCP_INT_CNTL_RING0, tmp); in gfx_v7_0_enable_gui_idle_interrupt() 4733 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v7_0_set_gfx_eop_interrupt_state() 4735 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v7_0_set_gfx_eop_interrupt_state() 4738 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v7_0_set_gfx_eop_interrupt_state() 4740 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v7_0_set_gfx_eop_interrupt_state() 4807 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v7_0_set_priv_reg_fault_state() 4809 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v7_0_set_priv_reg_fault_state() 4814 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v7_0_set_priv_reg_fault_state() 4834 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v7_0_set_priv_inst_fault_state() [all …]
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H A D | gfx_v8_0.c | 3897 u32 tmp = RREG32(mmCP_INT_CNTL_RING0); in gfx_v8_0_enable_gui_idle_interrupt() 3904 WREG32(mmCP_INT_CNTL_RING0, tmp); in gfx_v8_0_enable_gui_idle_interrupt()
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H A D | gfx_v9_0.c | 2691 tmp= RREG32_SOC15(GC, 0, mmCP_INT_CNTL_RING0); in gfx_v9_0_enable_gui_idle_interrupt() 2699 WREG32_SOC15(GC, 0, mmCP_INT_CNTL_RING0, tmp); in gfx_v9_0_enable_gui_idle_interrupt()
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/ |
H A D | gfx_v6_0.c | 2256 u32 tmp = RREG32(mmCP_INT_CNTL_RING0); in gfx_v6_0_enable_gui_idle_interrupt() 2266 WREG32(mmCP_INT_CNTL_RING0, tmp); in gfx_v6_0_enable_gui_idle_interrupt() 3243 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v6_0_set_gfx_eop_interrupt_state() 3245 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v6_0_set_gfx_eop_interrupt_state() 3248 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v6_0_set_gfx_eop_interrupt_state() 3250 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v6_0_set_gfx_eop_interrupt_state() 3306 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v6_0_set_priv_reg_fault_state() 3308 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v6_0_set_priv_reg_fault_state() 3313 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v6_0_set_priv_reg_fault_state() 3333 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v6_0_set_priv_inst_fault_state() [all …]
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H A D | gfx_v7_0.c | 3165 u32 tmp = RREG32(mmCP_INT_CNTL_RING0); in gfx_v7_0_enable_gui_idle_interrupt() 3173 WREG32(mmCP_INT_CNTL_RING0, tmp); in gfx_v7_0_enable_gui_idle_interrupt() 4733 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v7_0_set_gfx_eop_interrupt_state() 4735 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v7_0_set_gfx_eop_interrupt_state() 4738 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v7_0_set_gfx_eop_interrupt_state() 4740 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v7_0_set_gfx_eop_interrupt_state() 4807 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v7_0_set_priv_reg_fault_state() 4809 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v7_0_set_priv_reg_fault_state() 4814 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v7_0_set_priv_reg_fault_state() 4834 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v7_0_set_priv_inst_fault_state() [all …]
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H A D | gfx_v8_0.c | 3897 u32 tmp = RREG32(mmCP_INT_CNTL_RING0); in gfx_v8_0_enable_gui_idle_interrupt() 3904 WREG32(mmCP_INT_CNTL_RING0, tmp); in gfx_v8_0_enable_gui_idle_interrupt()
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/ |
H A D | gfx_v6_0.c | 2256 u32 tmp = RREG32(mmCP_INT_CNTL_RING0); in gfx_v6_0_enable_gui_idle_interrupt() 2266 WREG32(mmCP_INT_CNTL_RING0, tmp); in gfx_v6_0_enable_gui_idle_interrupt() 3243 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v6_0_set_gfx_eop_interrupt_state() 3245 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v6_0_set_gfx_eop_interrupt_state() 3248 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v6_0_set_gfx_eop_interrupt_state() 3250 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v6_0_set_gfx_eop_interrupt_state() 3306 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v6_0_set_priv_reg_fault_state() 3308 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v6_0_set_priv_reg_fault_state() 3313 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v6_0_set_priv_reg_fault_state() 3333 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v6_0_set_priv_inst_fault_state() [all …]
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H A D | gfx_v7_0.c | 3165 u32 tmp = RREG32(mmCP_INT_CNTL_RING0); in gfx_v7_0_enable_gui_idle_interrupt() 3173 WREG32(mmCP_INT_CNTL_RING0, tmp); in gfx_v7_0_enable_gui_idle_interrupt() 4733 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v7_0_set_gfx_eop_interrupt_state() 4735 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v7_0_set_gfx_eop_interrupt_state() 4738 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v7_0_set_gfx_eop_interrupt_state() 4740 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v7_0_set_gfx_eop_interrupt_state() 4807 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v7_0_set_priv_reg_fault_state() 4809 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v7_0_set_priv_reg_fault_state() 4814 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v7_0_set_priv_reg_fault_state() 4834 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v7_0_set_priv_inst_fault_state() [all …]
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gca/ |
H A D | gfx_6_0_d.h | 438 #define mmCP_INT_CNTL_RING0 0x306A macro
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H A D | gfx_7_2_d.h | 222 #define mmCP_INT_CNTL_RING0 0x306a macro
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H A D | gfx_7_0_d.h | 222 #define mmCP_INT_CNTL_RING0 0x306a macro
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H A D | gfx_8_1_d.h | 247 #define mmCP_INT_CNTL_RING0 0x306a macro
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H A D | gfx_8_0_d.h | 246 #define mmCP_INT_CNTL_RING0 0x306a macro
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gca/ |
H A D | gfx_6_0_d.h | 438 #define mmCP_INT_CNTL_RING0 0x306A macro
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H A D | gfx_7_2_d.h | 222 #define mmCP_INT_CNTL_RING0 0x306a macro
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H A D | gfx_7_0_d.h | 222 #define mmCP_INT_CNTL_RING0 0x306a macro
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H A D | gfx_8_0_d.h | 246 #define mmCP_INT_CNTL_RING0 0x306a macro
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H A D | gfx_8_1_d.h | 247 #define mmCP_INT_CNTL_RING0 0x306a macro
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gca/ |
H A D | gfx_6_0_d.h | 438 #define mmCP_INT_CNTL_RING0 0x306A macro
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H A D | gfx_7_0_d.h | 222 #define mmCP_INT_CNTL_RING0 0x306a macro
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H A D | gfx_7_2_d.h | 222 #define mmCP_INT_CNTL_RING0 0x306a macro
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H A D | gfx_8_0_d.h | 246 #define mmCP_INT_CNTL_RING0 0x306a macro
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H A D | gfx_8_1_d.h | 247 #define mmCP_INT_CNTL_RING0 0x306a macro
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/dports/sysutils/roct/ROCT-Thunk-Interface-9d1fb76/tests/kfdtest/include/asic_reg/ |
H A D | gfx_7_2_d.h | 222 #define mmCP_INT_CNTL_RING0 0x306a macro
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