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Searched refs:mmMP0_SMN_C2PMSG_81 (Results 1 – 25 of 33) sorted by relevance

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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Dpsp_v3_1.c95 sol_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81); in psp_v3_1_bootloader_load_sysdrv()
136 sol_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81); in psp_v3_1_bootloader_load_sos()
160 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_81), in psp_v3_1_bootloader_load_sos()
161 RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81), in psp_v3_1_bootloader_load_sos()
H A Dpsp_v12_0.c131 sol_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81); in psp_v12_0_bootloader_load_sysdrv()
172 sol_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81); in psp_v12_0_bootloader_load_sos()
196 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_81), in psp_v12_0_bootloader_load_sos()
197 RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81), in psp_v12_0_bootloader_load_sos()
H A Dpsp_v11_0.c251 sol_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81); in psp_v11_0_is_sos_alive()
388 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_81), in psp_v11_0_bootloader_load_sos()
389 RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81), in psp_v11_0_bootloader_load_sos()
H A Dnv.c875 sol_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81); in nv_need_reset_on_init()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Dpsp_v3_1.c95 sol_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81); in psp_v3_1_bootloader_load_sysdrv()
136 sol_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81); in psp_v3_1_bootloader_load_sos()
160 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_81), in psp_v3_1_bootloader_load_sos()
161 RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81), in psp_v3_1_bootloader_load_sos()
H A Dpsp_v12_0.c131 sol_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81); in psp_v12_0_bootloader_load_sysdrv()
172 sol_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81); in psp_v12_0_bootloader_load_sos()
196 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_81), in psp_v12_0_bootloader_load_sos()
197 RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81), in psp_v12_0_bootloader_load_sos()
H A Dpsp_v11_0.c251 sol_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81); in psp_v11_0_is_sos_alive()
388 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_81), in psp_v11_0_bootloader_load_sos()
389 RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81), in psp_v11_0_bootloader_load_sos()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Dpsp_v3_1.c95 sol_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81); in psp_v3_1_bootloader_load_sysdrv()
136 sol_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81); in psp_v3_1_bootloader_load_sos()
160 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_81), in psp_v3_1_bootloader_load_sos()
161 RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81), in psp_v3_1_bootloader_load_sos()
H A Dpsp_v12_0.c131 sol_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81); in psp_v12_0_bootloader_load_sysdrv()
172 sol_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81); in psp_v12_0_bootloader_load_sos()
196 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_81), in psp_v12_0_bootloader_load_sos()
197 RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81), in psp_v12_0_bootloader_load_sos()
H A Dpsp_v11_0.c251 sol_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81); in psp_v11_0_is_sos_alive()
388 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_81), in psp_v11_0_bootloader_load_sos()
389 RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81), in psp_v11_0_bootloader_load_sos()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/mp/
H A Dmp_10_0_offset.h126 #define mmMP0_SMN_C2PMSG_81 macro
H A Dmp_12_0_0_offset.h126 #define mmMP0_SMN_C2PMSG_81 macro
H A Dmp_9_0_offset.h126 #define mmMP0_SMN_C2PMSG_81 0x0091 macro
H A Dmp_11_0_offset.h126 #define mmMP0_SMN_C2PMSG_81 macro
H A Dmp_11_5_0_offset.h126 #define mmMP0_SMN_C2PMSG_81 macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/mp/
H A Dmp_10_0_offset.h126 #define mmMP0_SMN_C2PMSG_81 macro
H A Dmp_12_0_0_offset.h126 #define mmMP0_SMN_C2PMSG_81 macro
H A Dmp_11_0_offset.h126 #define mmMP0_SMN_C2PMSG_81 macro
H A Dmp_9_0_offset.h126 #define mmMP0_SMN_C2PMSG_81 0x0091 macro
H A Dmp_11_5_0_offset.h126 #define mmMP0_SMN_C2PMSG_81 macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/mp/
H A Dmp_12_0_0_offset.h126 #define mmMP0_SMN_C2PMSG_81 macro
H A Dmp_10_0_offset.h126 #define mmMP0_SMN_C2PMSG_81 macro
H A Dmp_11_0_offset.h126 #define mmMP0_SMN_C2PMSG_81 macro
H A Dmp_9_0_offset.h126 #define mmMP0_SMN_C2PMSG_81 0x0091 macro
H A Dmp_11_5_0_offset.h126 #define mmMP0_SMN_C2PMSG_81 macro

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